core/rng/rosc_entropy - Digital entropy source based on on jitter between multiple, digital ring oscillators

Age	Commit message (Collapse)	Author
2018-10-16	(1) Replaced the README.md with the better one that for some reason lived in ↵	Joachim Strömbergson
	the rtl directory. (2) Cleaned up reset statatements as part of effort to check that all registers are being properly reset.
2015-10-05	Changed warmup cycles to a cool million.	Joachim Strömbergson

2015-10-05	(1) Added warmup functionality to the rosc entropy provider. (2) Changed ↵	Joachim Strömbergson
	name of enable port in the core. (3) Added a rudimentary makefile to allos building and linting of the rosc entropy core.
2015-03-26	Changed fromm hard coded oscillator adder width to localparam and updated ↵	Joachim Strömbergson
	operand sizes used. Changed to localparams for parameters since they don't need to be exposed outside the module. Updated the oscillator array instantiation to reflect what is done.
2014-10-23	Added Xilinx specific constraint attribute to preserve the ring oscillators. ↵	Joachim Strömbergson
	Fixed name of rosc instances.
2014-09-26	Update of rosc entropy after synthesis of the trng.	Joachim Strömbergson

2014-09-24	Updates to fix bugs found during synthesis. Adding more debug outputs in ↵	Joachim Strömbergson
	API. Adding security error port for future internal health tests.
2014-09-18	Adding a new core for ring oscillator based entropy.	Joachim Strömbergson