Age | Commit message (Collapse) | Author | |
---|---|---|---|
2018-10-16 | (1) Replaced the README.md with the better one that for some reason lived in ↵ | Joachim Strömbergson | |
the rtl directory. (2) Cleaned up reset statatements as part of effort to check that all registers are being properly reset. | |||
2015-11-17 | Harmonize status valid bit with other cores. | Paul Selkirk | |
2015-11-16 | harmonize ctrl and status addresses with other cores | Paul Selkirk | |
2015-10-05 | Changed warmup cycles to a cool million. | Joachim Strömbergson | |
2015-10-05 | (1) Added warmup functionality to the rosc entropy provider. (2) Changed ↵ | Joachim Strömbergson | |
name of enable port in the core. (3) Added a rudimentary makefile to allos building and linting of the rosc entropy core. | |||
2015-04-28 | Remove the delayed read for EIM (see core/platform/novena commit 2f58e8f). | Paul Selkirk | |
2015-04-13 | Added a simple parameterized zero extension to squash warnings in ISE and ↵ | Joachim Strömbergson | |
Verilator. | |||
2015-04-13 | Adding a test design that instantiates a single Cryptech ring oscillator ↵ | Joachim Strömbergson | |
with registered inputs and outputs. This allow us to test implementations in different FPGA technologies for different oscillator configurations. | |||
2015-03-26 | Adding a README for the rosc entropy source with a short description of what ↵ | Joachim Strömbergson | |
the core is, how it works and implementation status for different FPGAs. | |||
2015-03-26 | Changed fromm hard coded oscillator adder width to localparam and updated ↵ | Joachim Strömbergson | |
operand sizes used. Changed to localparams for parameters since they don't need to be exposed outside the module. Updated the oscillator array instantiation to reflect what is done. | |||
2015-03-25 | register data for eim output | Paul Selkirk | |
2014-11-14 | Added addresses and hard coded strings for name and version accessible from ↵ | Joachim Strömbergson | |
API. Updated API addresses. | |||
2014-11-07 | Added Bernd Paysan as author. | Joachim Strömbergson | |
2014-10-23 | Added Xilinx specific constraint attribute to preserve the ring oscillators. ↵ | Joachim Strömbergson | |
Fixed name of rosc instances. | |||
2014-10-02 | Changed name of register to make it more obvious what it is. | Joachim Strömbergson | |
2014-09-26 | Update of rosc entropy after synthesis of the trng. | Joachim Strömbergson | |
2014-09-24 | Fixed synthesis warnings. | Joachim Strömbergson | |
2014-09-24 | Adding an enable signal port for any consumers to know that the provider is ↵ | Joachim Strömbergson | |
active. | |||
2014-09-24 | Updates to fix bugs found during synthesis. Adding more debug outputs in ↵ | Joachim Strömbergson | |
API. Adding security error port for future internal health tests. | |||
2014-09-18 | Adding a new core for ring oscillator based entropy. | Joachim Strömbergson | |