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Diffstat (limited to 'core_selector/src/rtl/global_selector.v')
| -rw-r--r-- | core_selector/src/rtl/global_selector.v | 153 |
1 files changed, 0 insertions, 153 deletions
diff --git a/core_selector/src/rtl/global_selector.v b/core_selector/src/rtl/global_selector.v deleted file mode 100644 index 2b9e20a..0000000 --- a/core_selector/src/rtl/global_selector.v +++ /dev/null @@ -1,153 +0,0 @@ -//====================================================================== -// -// global_selector.v -// ----------------- -// Top level wrapper that creates the Cryptech coretest system. -// The wrapper contains instances of external interface, coretest -// and the core to be tested. And if more than one core is -// present the wrapper also includes address and data muxes. -// -// -// Authors: Joachim Strombergson, Paul Selkirk, Pavel Shatov -// Copyright (c) 2014-2015, NORDUnet A/S All rights reserved. -// -// Redistribution and use in source and binary forms, with or without -// modification, are permitted provided that the following conditions are -// met: -// - Redistributions of source code must retain the above copyright notice, -// this list of conditions and the following disclaimer. -// -// - Redistributions in binary form must reproduce the above copyright -// notice, this list of conditions and the following disclaimer in the -// documentation and/or other materials provided with the distribution. -// -// - Neither the name of the NORDUnet nor the names of its contributors may -// be used to endorse or promote products derived from this software -// without specific prior written permission. -// -// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS -// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED -// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -// -//====================================================================== - -module global_selector - ( - input wire sys_clk, - input wire sys_rst_n, - input wire sys_ena, - - input wire [13: 0] sys_eim_addr, - input wire sys_eim_wr, - input wire sys_eim_rd, - output wire [31 : 0] sys_read_data, - input wire [31 : 0] sys_write_data, - output wire sys_error - ); - - - //---------------------------------------------------------------- - // Address Decoder - //---------------------------------------------------------------- - // upper 6 bits specify core being addressed - wire [ 5: 0] addr_core_num = sys_eim_addr[13: 8]; - // lower 8 bits specify register offset in core - wire [ 7: 0] addr_core_reg = sys_eim_addr[ 7: 0]; - - - //---------------------------------------------------------------- - // Core Address Table - //---------------------------------------------------------------- - localparam CORE_ADDR_BOARD_REGS = 6'd0; - localparam CORE_ADDR_COMM_REGS = 6'd1; - - - //---------------------------------------------------------------- - // Board-Level Registers - //---------------------------------------------------------------- - wire [31: 0] read_data_board; - wire enable_board = sys_ena && (addr_core_num == CORE_ADDR_BOARD_REGS); - wire error_board; - - board_regs board_regs - ( - .clk(sys_clk), - .reset_n(sys_rst_n), - - .cs(enable_board & (sys_eim_rd | sys_eim_wr)), - .we(sys_eim_wr), - - .address(addr_core_reg), - .write_data(sys_write_data), - .read_data(read_data_board), - .error(error_board) - ); - - - //---------------------------------------------------------------- - // Communication-Channel Registers - //---------------------------------------------------------------- - wire [31: 0] read_data_comm; - wire enable_comm = sys_ena && (addr_core_num == CORE_ADDR_COMM_REGS); - wire error_comm; - - comm_regs comm_regs - ( - .clk(sys_clk), - .reset_n(sys_rst_n), - - .cs(enable_comm & (sys_eim_rd | sys_eim_wr)), - .we(sys_eim_wr), - - .address(addr_core_reg), - .write_data(sys_write_data), - .read_data(read_data_comm), - .error(error_comm) - ); - - - //---------------------------------------------------------------- - // Output (Read Data) Multiplexor - //---------------------------------------------------------------- - reg [31: 0] sys_read_data_mux; - assign sys_read_data = sys_read_data_mux; - reg sys_error_mux; - assign sys_error = sys_error_mux; - - always @* - // - case (addr_core_num) - // - CORE_ADDR_BOARD_REGS: - begin - sys_read_data_mux = read_data_board; - sys_error_mux = error_board; - end - CORE_ADDR_COMM_REGS: - begin - sys_read_data_mux = read_data_comm; - sys_error_mux = error_comm; - end - // - default: - begin - sys_read_data_mux = {32{1'b0}}; - sys_error_mux = 1; - end - // - endcase - - -endmodule - -//====================================================================== -// EOF global_selector.v -//====================================================================== |