diff options
| -rw-r--r-- | config/core.cfg | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/config/core.cfg b/config/core.cfg index d6de1fa..8a7d252 100644 --- a/config/core.cfg +++ b/config/core.cfg @@ -86,12 +86,16 @@ cores = sha256 aes trng modexp # Make me one with everything, except we want two modexp cores for parallel CRT cores = sha1 sha256 sha512 aes trng modexp modexp mkmif ecdsa256 ecdsa384 +[project keywrap] +# for testing Joachim's keywrap core with RSA signing +cores = mkmif sha256 aes trng modexp keywrap + # [core] sections # # vfiles: A list of Verilog files to include in the vfiles list when -# including a particular core. All (optional) cores must have a -# vfiles option, so that the configuration program knows what to put -# into core_vfiles.mk. +# including a particular core. File paths are relative to the cores/ +# directory. All (optional) cores must have a vfiles option, so that the +# configuration program knows what to put into core_vfiles.mk. # # requires: A list of other cores whose vfiles must be loaded to build # this core. This has no effect on the generated core_selector.v @@ -325,3 +329,14 @@ vfiles = lib/modular/modular_adder.v lib/modular/modular_subtractor.v lib/lowlevel/artix7/dsp48e1_wrapper.v + +[core keywrap] +# Joachim's experimental AES-keywrap core +requires = aes +block memory = yes +error wire = yes +module name = keywrap +vfiles = + ../user/js/keywrap/src/rtl/keywrap.v + ../user/js/keywrap/src/rtl/keywrap_core.v + ../user/js/keywrap/src/rtl/keywrap_mem.v |