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author | Rob Austein <sra@hactrn.net> | 2017-03-07 19:52:36 -0500 |
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committer | Rob Austein <sra@hactrn.net> | 2017-03-07 19:52:36 -0500 |
commit | 89f913c3aa2a6dad35630f3882a06b99e0978105 (patch) | |
tree | a8c05b11c926ad72f10a0c4b798ef4b46912e3bf /rtl/modular/modular_invertor/modinv_clog2.v | |
parent | 9fa6e368879d30835880b3bb0e87c8cf13dd9874 (diff) |
Promote to a repository in the core tree.
Change name of reset signal from rst_n to reset_n for consistancy with
other Cryptech cores.
Code common between this core and the ecdsa384 core split out into a
separate library repository.
Minor cleanup (Windows-isms, indentation).
Diffstat (limited to 'rtl/modular/modular_invertor/modinv_clog2.v')
-rw-r--r-- | rtl/modular/modular_invertor/modinv_clog2.v | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/rtl/modular/modular_invertor/modinv_clog2.v b/rtl/modular/modular_invertor/modinv_clog2.v deleted file mode 100644 index 2f7b64d..0000000 --- a/rtl/modular/modular_invertor/modinv_clog2.v +++ /dev/null @@ -1,10 +0,0 @@ -function integer clog2;
- input integer value;
- integer result;
- begin
- value = value - 1;
- for (result = 0; value > 0; result = result + 1)
- value = value >> 1;
- clog2 = result;
- end
-endfunction
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