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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2018-04-17 14:48:03 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2018-04-17 14:48:03 +0300
commitbbca08857a55439eae903b891fcc7de5ebea61a7 (patch)
treebe3dacb36724e6ee1f6ab5ec1f848d792b3a4f94 /rtl/lowlevel/artix7/dsp48e1_wrapper.v
parent53014b4a47adcd959640c3934d4e503021f6c21c (diff)
Modified the test program to verify that changes in Verilog do work.fix
Diffstat (limited to 'rtl/lowlevel/artix7/dsp48e1_wrapper.v')
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