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| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2018-12-19 15:34:55 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2018-12-19 15:41:00 +0300 |
| commit | c617c0c711620f58eb3ead22edcdfe57fed06088 (patch) | |
| tree | 8c15184d5ca6403ea01843560394f6d909a0986f /rtl/lowlevel/artix7/dsp48e1_wrapper.v | |
| parent | ea4d251c81c8b53e0bbc71cd1719dfea4d0517c1 (diff) | |
core for better timing performance
* Removed custom modular inversion sub-module, now uses micro-coded modular
inversion routine based on Fermat's little theorem (~10% faster)
* Uses math primitives from core/lib
* Added randomized test vector
(see user/shatov/ecdsa_fpga_model/test_vectors/)
Diffstat (limited to 'rtl/lowlevel/artix7/dsp48e1_wrapper.v')
0 files changed, 0 insertions, 0 deletions