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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-03 16:40:25 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2019-10-03 16:40:25 +0300
commitaffada8d5da7426d22035360c3674ab3b3311ab5 (patch)
treea3db075dc03033db45e3ad5279badf2da48b4566 /rtl/modexpng_sdp_36k_x18_wrapper.v
parent0b4b42da734c1164b65a334351274f946b2d4dcb (diff)
Reworked storage architecture (moved I/O memory to a separate module, since there's
only one instance of input/output values, while storage manager has dual storage space for P and Q multipliers). Started working on microcoded layer, added input operation and modular multiplication.
Diffstat (limited to 'rtl/modexpng_sdp_36k_x18_wrapper.v')
-rw-r--r--rtl/modexpng_sdp_36k_x18_wrapper.v67
1 files changed, 67 insertions, 0 deletions
diff --git a/rtl/modexpng_sdp_36k_x18_wrapper.v b/rtl/modexpng_sdp_36k_x18_wrapper.v
new file mode 100644
index 0000000..ded9425
--- /dev/null
+++ b/rtl/modexpng_sdp_36k_x18_wrapper.v
@@ -0,0 +1,67 @@
+module modexpng_sdp_36k_x18_wrapper
+(
+ clk,
+
+ ena, wea,
+ addra, dina,
+
+ enb, regceb,
+ addrb, doutb
+);
+
+
+ //
+ // Headers
+ //
+ `include "modexpng_parameters.vh"
+
+
+ //
+ // Ports
+ //
+ input clk;
+
+ input ena;
+ input wea;
+ input [BANK_ADDR_W + OP_ADDR_W -1:0] addra;
+ input [ WORD_EXT_W -1:0] dina;
+
+ input enb;
+ input regceb;
+ input [BANK_ADDR_W + OP_ADDR_W -1:0] addrb;
+ output [ WORD_EXT_W -1:0] doutb;
+
+ //
+ // Memory
+ //
+ reg [WORD_EXT_W -1:0] mem[0:2**(BANK_ADDR_W+OP_ADDR_W)-1];
+
+ //
+ // Write Port
+ //
+ always @(posedge clk)
+ //
+ if (ena && wea)
+ mem[addra] <= dina;
+
+ //
+ // Read Port
+ //
+ reg [WORD_EXT_W -1:0] doutb_reg1;
+ reg [WORD_EXT_W -1:0] doutb_reg2;
+
+ assign doutb = doutb_reg2;
+
+ always @(posedge clk)
+ //
+ if (enb)
+ doutb_reg1 <= mem[addrb];
+
+ always @(posedge clk)
+ //
+ if (regceb)
+ doutb_reg2 <= doutb_reg1;
+
+
+
+endmodule