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path: root/src/rtl/montprod.v
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2015-06-23Updated all modules below modexp_core has been updated to have generic ↵Joachim Strömbergson
operand size. Updated module integrations in modexp_core to set the operand width and address width.
2015-06-23montprod now supports generic operand size.Joachim Strömbergson
2015-06-23Made the adder and shifters words size generic. Updated the montprod and ↵Joachim Strömbergson
residue to use the generic adder and shifters.
2015-06-22Changed blockmem1r1w used in montprod to generic data and address widths. ↵Joachim Strömbergson
Updated instantiation to use generics.
2015-06-22Adding a minor comment in the header to exmplain what the module parameters ↵Joachim Strömbergson
means.
2015-06-22Changing module interface and internal defines to use symbolic widths for ↵Joachim Strömbergson
operand data size and addresses. We need to update counters too.
2015-06-22Consolidated address settings, removed stale s logic mux control, removed ↵Joachim Strömbergson
extra lsw set.
2015-06-22Killed off debug in RTL since we now whow info from TB.Joachim Strömbergson
2015-06-22Removing stale states in FSM.Joachim Strömbergson
2015-06-22Removing state that has been collapsed.Joachim Strömbergson
2015-06-22Cleanup of prodcalc.Joachim Strömbergson
2015-06-22Adding write control of s_mem for first iteration and adding a new stage in ↵Joachim Strömbergson
priority mux.
2015-06-22Adding mux to allow integrating s_mem init with main adder loop.Joachim Strömbergson
2015-06-18Adding iteration flag to be used to remove zero fill of s_mem.Joachim Strömbergson
2015-06-18Moved s logic mux control to control fsm.Joachim Strömbergson
2015-06-18Correct update after linting.Joachim Strömbergson
2015-06-18Restored version of montprod to a version that actually works.Joachim Strömbergson
2015-06-18Combined case statements to make it easier to follow the sequences.Joachim Strömbergson
2015-06-18Update after linting after cycle collapsing.Joachim Strömbergson
2015-06-17(1) Collapsed the sm and sa adder states. Thisimoproves performance for ↵Joachim Strömbergson
modexp with 3%. (2) Updated montprod testbench to not use the now removed states. (3) Minor code cleanup to make it easier to work with for further improvements.
2015-06-17(1) Cleaned up bit select for operand b and a. (2) Fixed name of loop ↵Joachim Strömbergson
counter. (3) Reordered processes to main datapath first.
2015-06-17Fixed order of states.Joachim Strömbergson
2015-06-16Merge of s_mux and s_write to allow cycle collapsing.Joachim Strömbergson
2015-06-16Collapsing cycles for loop counter. Updating testbench to match removed cycles.Joachim Strömbergson
2015-06-16Collapsed done. Removes one cycle from each montprod.Joachim Strömbergson
2015-06-15cleanup of s mem write control.Joachim Strömbergson
2015-06-15Fixed the carry registers.Joachim Strömbergson
2015-06-15Fixed prev reg:Joachim Strömbergson
2015-06-15(1) Fixing up write address register fo s mem. (2) Cleanup of loop counter.Joachim Strömbergson
2015-06-15Cleanup and fixing name in preparation for cycle crunch.Joachim Strömbergson
2015-05-08Fixed RH operand size.Joachim Strömbergson
2015-04-27Adding localparam for debugging that had gone missing.Joachim Strömbergson
2015-04-27Updating modexp core to v 0.50. This version contains a working core that ↵Joachim Strömbergson
can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
2015-04-13Adding initial versions of rtl for modexp. Montgomery multiplication works ↵Joachim Strömbergson
for 8192 bit operands. Modexp can build, but lacks proper control and residue generator. Memories has been tested to match block memories in Xilinx and Altera FPGAs.