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authorJoachim StroĢˆmbergson <joachim@secworks.se>2015-06-22 22:12:20 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2015-06-22 22:12:20 +0200
commit5a0a6f87f2f63f9f1044725db0cac212c63f1fd6 (patch)
treef6d163325f49379043907ef529877785fbfe653f /src/rtl/montprod.v
parenta66de21d53a0bf2565dd9647ed49c4bdb84e2f11 (diff)
Changed blockmem1r1w used in montprod to generic data and address widths. Updated instantiation to use generics.
Diffstat (limited to 'src/rtl/montprod.v')
-rw-r--r--src/rtl/montprod.v19
1 files changed, 9 insertions, 10 deletions
diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index 0bfd3c8..465fa38 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -4,7 +4,7 @@
// ---------
// Montgomery product calculator for the modular exponentiantion core.
//
-// paremeter OPW is operand word width in bits.
+// parameter OPW is operand word width in bits.
// parameter ADW is address width in bits.
//
//
@@ -186,15 +186,14 @@ module montprod #(parameter OPW = 32, parameter ADW = 8)
//----------------------------------------------------------------
// Instantions
//----------------------------------------------------------------
- blockmem1r1w s_mem(
- .clk(clk),
- .read_addr(s_mem_addr),
- .read_data(s_mem_read_data),
- .wr(s_mem_we_reg),
- .write_addr(s_mem_wr_addr_reg),
- .write_data(s_mem_new)
- );
-
+ blockmem1r1w #(.OPW(OPW), .ADW(ADW)) s_mem(
+ .clk(clk),
+ .read_addr(s_mem_addr),
+ .read_data(s_mem_read_data),
+ .wr(s_mem_we_reg),
+ .write_addr(s_mem_wr_addr_reg),
+ .write_data(s_mem_new)
+ );
adder32 s_adder_sm(
.a(muxed_s_mem_read_data),