aboutsummaryrefslogtreecommitdiff
path: root/src/rtl/montprod.v
diff options
context:
space:
mode:
authorJoachim StroĢˆmbergson <joachim@secworks.se>2015-04-27 11:17:08 +0200
committerJoachim StroĢˆmbergson <joachim@secworks.se>2015-04-27 11:17:08 +0200
commita315223f98fa6f1fdea2b1080c5f3e33352ebb13 (patch)
tree0fb3f6c458df78f58017e9475ff3b0c5cb3b52d0 /src/rtl/montprod.v
parent502f0f429a261628fe5e43582280012541c40804 (diff)
Updating modexp core to v 0.50. This version contains a working core that can perform sign and verify with big keys/values. The core builds ok in Altera and Xilinx FPGA tools. This commit also includes a new testgenerator capable of generating testbench for modexp with autgenerated test data of different lengths. The README has been updated with status and implementation results in for different FPGA devices.
Diffstat (limited to 'src/rtl/montprod.v')
-rw-r--r--src/rtl/montprod.v12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index 32bbdec..2ed1f5d 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -63,6 +63,7 @@ module montprod(
//----------------------------------------------------------------
// Internal constant and parameter definitions.
//----------------------------------------------------------------
+
localparam CTRL_IDLE = 4'h0;
localparam CTRL_INIT_S = 4'h1;
localparam CTRL_LOOP_INIT = 4'h2;
@@ -217,9 +218,11 @@ module montprod(
SMUX_SHR:
s_mem_new = shr_adiv2;
endcase
- $display("SMUX%x: %x", s_mux_reg, s_mem_new);
+ if (DEBUG)
+ $display("SMUX%x: %x", s_mux_reg, s_mem_new);
end
+
//----------------------------------------------------------------
// reg_update
//
@@ -286,7 +289,8 @@ module montprod(
//opa_addr will point to length-1 to get A LSB.
//s_read_addr will point to length-1
q = s_mem_read_data[0] ^ (opa_data[0] & b);
- $display("s_mem_read_data: %x opa_data %x b %x q %x B_bit_index_reg %x", s_mem_read_data, opa_data, b, q, B_bit_index_reg);
+ if (DEBUG)
+ $display("s_mem_read_data: %x opa_data %x b %x q %x B_bit_index_reg %x", s_mem_read_data, opa_data, b, q, B_bit_index_reg);
end
end
@@ -296,6 +300,7 @@ module montprod(
//----------------------------------------------------------------
always @*
begin : loop_counter_process
+ loop_counter_new = loop_counter;
length_m1 = length - 1'b1;
loop_counter_dec = loop_counter - 1'b1;
B_word_index = loop_counter[12:5];
@@ -560,7 +565,8 @@ module montprod(
CTRL_EMIT_S:
begin
- $display("EMIT_S word_index: %d", word_index);
+ if (DEBUG)
+ $display("EMIT_S word_index: %d", word_index);
if (word_index_prev == 8'h0)
begin
montprod_ctrl_new = CTRL_DONE;