Promote code common to both ECDSA* cores to separate repository in core/ tree.

Pavel's two ECDSA base point multiplier cores share a fair amount of
code.  Maintenance issues aside, the duplication confused the Xilinx
synthesis tools if one tried to build a single bitstream containing
both cores, so we've separated the common code out into this library.

The selection of files in this library was done by comparing the rtl
trees of the two original core repositories using "diff -rqws" and
selecting the files which diff reported as being identical.

Also dealt with some cosmetic issues (indentation, Windows-isms, etc).

1 files changed, 19 insertions, 19 deletions

diff --git a/rtl/util/bram_1rw_1ro_readfirst.v b/rtl/util/bram_1rw_1ro_readfirst.v
index 28782c2..db62726 100644
--- a/rtl/util/bram_1rw_1ro_readfirst.v
+++ b/rtl/util/bram_1rw_1ro_readfirst.v
@@ -36,11 +36,11 @@ module bram_1rw_1ro_readfirst
   #(parameter MEM_WIDTH            = 32,
     parameter MEM_ADDR_BITS        = 8)
    (
-    input wire                     clk,
+    input wire 			   clk,
 
     input wire [MEM_ADDR_BITS-1:0] a_addr,
-    input wire                     a_wr,
-    input wire [MEM_WIDTH-1:0]     a_in,
+    input wire 			   a_wr,
+    input wire [MEM_WIDTH-1:0] 	   a_in,
     output wire [MEM_WIDTH-1:0]    a_out,
 
     input wire [MEM_ADDR_BITS-1:0] b_addr,
@@ -52,27 +52,27 @@ module bram_1rw_1ro_readfirst
    // BRAM
    //
    (* RAM_STYLE="BLOCK" *)
-   reg [MEM_WIDTH-1:0]             bram[0:(2**MEM_ADDR_BITS)-1];

-	

-	

-	//

-	// Initialization

-	//

-	/**

-	integer c;

-	initial begin

-		for (c=0; c<(2**MEM_ADDR_BITS); c=c+1)

-			bram[c] = {MEM_WIDTH{1'b0}};

-	end

-	**/

-	
+   reg [MEM_WIDTH-1:0] 		   bram[0:(2**MEM_ADDR_BITS)-1];
+
+
+   //
+   // Initialization
+   //
+   /**
+    integer c;
+    initial begin
+    for (c=0; c<(2**MEM_ADDR_BITS); c=c+1)
+    bram[c] = {MEM_WIDTH{1'b0}};
+	end
+    **/
+
 
 
    //
    // Output Registers
    //
-   reg [MEM_WIDTH-1:0]             bram_reg_a;
-   reg [MEM_WIDTH-1:0]             bram_reg_b;
+   reg [MEM_WIDTH-1:0] 		   bram_reg_a;
+   reg [MEM_WIDTH-1:0] 		   bram_reg_b;
 
    assign a_out = bram_reg_a;
    assign b_out = bram_reg_b;