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authorRob Austein <sra@hactrn.net>2017-03-07 19:46:44 -0500
committerRob Austein <sra@hactrn.net>2017-03-07 19:46:44 -0500
commitab4638f70ee846de7398a3d78d467a9551e508cf (patch)
tree61c330bb0be48daa4faf3830abfa84c9e5f400d7 /rtl/modular/modular_invertor/modinv_clog2.v
parent9fa6e368879d30835880b3bb0e87c8cf13dd9874 (diff)
Promote code common to both ECDSA* cores to separate repository in core/ tree.
Pavel's two ECDSA base point multiplier cores share a fair amount of code. Maintenance issues aside, the duplication confused the Xilinx synthesis tools if one tried to build a single bitstream containing both cores, so we've separated the common code out into this library. The selection of files in this library was done by comparing the rtl trees of the two original core repositories using "diff -rqws" and selecting the files which diff reported as being identical. Also dealt with some cosmetic issues (indentation, Windows-isms, etc).
Diffstat (limited to 'rtl/modular/modular_invertor/modinv_clog2.v')
-rw-r--r--rtl/modular/modular_invertor/modinv_clog2.v20
1 files changed, 10 insertions, 10 deletions
diff --git a/rtl/modular/modular_invertor/modinv_clog2.v b/rtl/modular/modular_invertor/modinv_clog2.v
index 2f7b64d..04a7739 100644
--- a/rtl/modular/modular_invertor/modinv_clog2.v
+++ b/rtl/modular/modular_invertor/modinv_clog2.v
@@ -1,10 +1,10 @@
-function integer clog2;
- input integer value;
- integer result;
- begin
- value = value - 1;
- for (result = 0; value > 0; result = result + 1)
- value = value >> 1;
- clog2 = result;
- end
-endfunction
+function integer clog2;
+ input integer value;
+ integer result;
+ begin
+ value = value - 1;
+ for (result = 0; value > 0; result = result + 1)
+ value = value >> 1;
+ clog2 = result;
+ end
+endfunction