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| author | Joachim StroĢmbergson <joachim@secworks.se> | 2018-08-28 12:44:40 +0200 |
|---|---|---|
| committer | Joachim StroĢmbergson <joachim@secworks.se> | 2018-08-28 12:44:40 +0200 |
| commit | 0e7de630d80ad112bbb430434b6a5830d357d3d6 (patch) | |
| tree | 703c7531a03b42bbe68a78f1c2299df82a99f08d /src/rtl/sha256_w_mem.v | |
| parent | d2d5cb5efef2b77b728b97280209121020189010 (diff) | |
Added pipeline register and stall cycle in the FSM to accomodate the pipeline. Registers not yet used in the design. Cleaned up constants to silence lint.
Diffstat (limited to 'src/rtl/sha256_w_mem.v')
0 files changed, 0 insertions, 0 deletions