diff options
Diffstat (limited to 'src/rtl/i2c_core.v')
| -rw-r--r-- | src/rtl/i2c_core.v | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/rtl/i2c_core.v b/src/rtl/i2c_core.v index 89bcba7..798c105 100644 --- a/src/rtl/i2c_core.v +++ b/src/rtl/i2c_core.v @@ -156,7 +156,7 @@ module i2c_core ( end always @ (*) begin - case (I2C_cstate) //synthesis parallel_case full_case + case (I2C_cstate) I2C_START: begin // wait for the start condition I2C_nstate = ((SDA_cstate == SDA_FALL) && (SCL_cstate == SCL_HIGH)) ? I2C_DADDR : I2C_START; end @@ -238,7 +238,7 @@ module i2c_core ( SDA_pd <= 1'b0; I2C_rdata <= 8'b0; end else begin - case (I2C_cstate) // synthesis parallel_case full_case + case (I2C_cstate) I2C_START: begin // everything in reset I2C_bitcnt <= 4'b0; I2C_daddr <= 8'b0; @@ -437,7 +437,7 @@ module i2c_core ( end always @ (*) begin - case (SCL_cstate) //synthesis parallel_case full_case + case (SCL_cstate) SCL_HIGH: begin SCL_nstate = ((SCL_rfcnt > TRF_CYCLES) && (SCL_sync == 1'b0)) ? SCL_FALL : SCL_HIGH; end @@ -457,7 +457,7 @@ module i2c_core ( if( reset ) begin SCL_rfcnt <= 5'b0; end else begin - case (SCL_cstate) // synthesis parallel_case full_case + case (SCL_cstate) SCL_HIGH: begin if( SCL_sync == 1'b1 ) begin SCL_rfcnt <= 5'b0; @@ -520,7 +520,7 @@ module i2c_core ( end always @ (*) begin - case (SDA_cstate) //synthesis parallel_case full_case + case (SDA_cstate) SDA_HIGH: begin SDA_nstate = ((SDA_rfcnt > TRF_CYCLES) && (SDA_sync == 1'b0)) ? SDA_FALL : SDA_HIGH; end @@ -540,7 +540,7 @@ module i2c_core ( if( reset ) begin SDA_rfcnt <= 5'b0; end else begin - case (SDA_cstate) // synthesis parallel_case full_case + case (SDA_cstate) SDA_HIGH: begin if( SDA_sync == 1'b1 ) begin SDA_rfcnt <= 5'b0; |