diff options
Diffstat (limited to 'src/tb/tb_aes.v')
| -rw-r--r-- | src/tb/tb_aes.v | 120 |
1 files changed, 54 insertions, 66 deletions
diff --git a/src/tb/tb_aes.v b/src/tb/tb_aes.v index 377ed76..cb42010 100644 --- a/src/tb/tb_aes.v +++ b/src/tb/tb_aes.v @@ -37,12 +37,6 @@ //====================================================================== //------------------------------------------------------------------ -// Simulator directives. -//------------------------------------------------------------------ -`timescale 1ns/100ps - - -//------------------------------------------------------------------ // Test module. //------------------------------------------------------------------ module tb_aes(); @@ -50,52 +44,52 @@ module tb_aes(); //---------------------------------------------------------------- // Internal constant and parameter definitions. //---------------------------------------------------------------- - localparam DEBUG = 0; + parameter DEBUG = 0; - localparam CLK_HALF_PERIOD = 1; - localparam CLK_PERIOD = 2 * CLK_HALF_PERIOD; + parameter CLK_HALF_PERIOD = 1; + parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD; // The DUT address map. - localparam ADDR_NAME0 = 8'h00; - localparam ADDR_NAME1 = 8'h01; - localparam ADDR_VERSION = 8'h02; + parameter ADDR_NAME0 = 8'h00; + parameter ADDR_NAME1 = 8'h01; + parameter ADDR_VERSION = 8'h02; - localparam ADDR_CTRL = 8'h08; - localparam CTRL_INIT_BIT = 0; - localparam CTRL_NEXT_BIT = 1; + parameter ADDR_CTRL = 8'h08; + parameter CTRL_INIT_BIT = 0; + parameter CTRL_NEXT_BIT = 1; + parameter CTRL_ENCDEC_BIT = 2; + parameter CTRL_KEYLEN_BIT = 3; - localparam ADDR_STATUS = 8'h09; - localparam STATUS_READY_BIT = 0; - localparam STATUS_VALID_BIT = 1; + parameter ADDR_STATUS = 8'h09; + parameter STATUS_READY_BIT = 0; + parameter STATUS_VALID_BIT = 1; - localparam ADDR_CONFIG = 8'h0a; - localparam CTRL_ENCDEC_BIT = 2; - localparam CTRL_KEYLEN_BIT = 3; + parameter ADDR_CONFIG = 8'h0a; - localparam ADDR_KEY0 = 8'h10; - localparam ADDR_KEY1 = 8'h11; - localparam ADDR_KEY2 = 8'h12; - localparam ADDR_KEY3 = 8'h13; - localparam ADDR_KEY4 = 8'h14; - localparam ADDR_KEY5 = 8'h15; - localparam ADDR_KEY6 = 8'h16; - localparam ADDR_KEY7 = 8'h17; + parameter ADDR_KEY0 = 8'h10; + parameter ADDR_KEY1 = 8'h11; + parameter ADDR_KEY2 = 8'h12; + parameter ADDR_KEY3 = 8'h13; + parameter ADDR_KEY4 = 8'h14; + parameter ADDR_KEY5 = 8'h15; + parameter ADDR_KEY6 = 8'h16; + parameter ADDR_KEY7 = 8'h17; - localparam ADDR_BLOCK0 = 8'h20; - localparam ADDR_BLOCK1 = 8'h21; - localparam ADDR_BLOCK2 = 8'h22; - localparam ADDR_BLOCK3 = 8'h23; + parameter ADDR_BLOCK0 = 8'h20; + parameter ADDR_BLOCK1 = 8'h21; + parameter ADDR_BLOCK2 = 8'h22; + parameter ADDR_BLOCK3 = 8'h23; - localparam ADDR_RESULT0 = 8'h30; - localparam ADDR_RESULT1 = 8'h31; - localparam ADDR_RESULT2 = 8'h32; - localparam ADDR_RESULT3 = 8'h33; + parameter ADDR_RESULT0 = 8'h30; + parameter ADDR_RESULT1 = 8'h31; + parameter ADDR_RESULT2 = 8'h32; + parameter ADDR_RESULT3 = 8'h33; - localparam AES_128_BIT_KEY = 0; - localparam AES_256_BIT_KEY = 1; + parameter AES_128_BIT_KEY = 0; + parameter AES_256_BIT_KEY = 1; - localparam AES_DECIPHER = 1'b0; - localparam AES_ENCIPHER = 1'b1; + parameter AES_DECIPHER = 1'b0; + parameter AES_ENCIPHER = 1'b1; //---------------------------------------------------------------- @@ -132,11 +126,6 @@ module tb_aes(); //---------------------------------------------------------------- - // Concurrent assignments. - //---------------------------------------------------------------- - - - //---------------------------------------------------------------- // clk_gen // // Always running clock generator process. @@ -172,7 +161,7 @@ module tb_aes(); // // Dump the state of the dump when needed. //---------------------------------------------------------------- - task dump_dut_state(); + task dump_dut_state; begin $display("cycle: 0x%016x", cycle_ctr); $display("State of DUT"); @@ -182,7 +171,7 @@ module tb_aes(); $display(""); $display("block: 0x%08x, 0x%08x, 0x%08x, 0x%08x", - dut.block0_reg, dut.block1_reg, dut.block2_reg, dut.block3_reg); + dut.block_reg[0], dut.block_reg[1], dut.block_reg[2], dut.block_reg[3]); $display(""); end @@ -194,7 +183,7 @@ module tb_aes(); // // Toggle reset to put the DUT into a well known state. //---------------------------------------------------------------- - task reset_dut(); + task reset_dut; begin $display("*** Toggle reset."); tb_reset_n = 0; @@ -211,7 +200,7 @@ module tb_aes(); // // Display the accumulated test results. //---------------------------------------------------------------- - task display_test_results(); + task display_test_results; begin if (error_ctr == 0) begin @@ -232,19 +221,19 @@ module tb_aes(); // Initialize all counters and testbed functionality as well // as setting the DUT inputs to defined values. //---------------------------------------------------------------- - task init_sim(); + task init_sim; begin - cycle_ctr = 0; - error_ctr = 0; - tc_ctr = 0; + cycle_ctr = 0; + error_ctr = 0; + tc_ctr = 0; - tb_clk = 0; - tb_reset_n = 1; + tb_clk = 0; + tb_reset_n = 1; - tb_cs = 0; - tb_we = 0; - tb_address = 8'h00; - tb_write_data = 32'h00000000; + tb_cs = 0; + tb_we = 0; + tb_address = 8'h0; + tb_write_data = 32'h0; end endtask // init_sim @@ -254,7 +243,7 @@ module tb_aes(); // // Write the given word to the DUT using the DUT interface. //---------------------------------------------------------------- - task write_word(input [11 : 0] address, + task write_word(input [11 : 0] address, input [31 : 0] word); begin if (DEBUG) @@ -319,7 +308,7 @@ module tb_aes(); // // Read the result block in the dut. //---------------------------------------------------------------- - task read_result(); + task read_result; begin read_word(ADDR_RESULT0); result_data[127 : 096] = read_data; @@ -385,12 +374,13 @@ module tb_aes(); input [127 : 0] expected); begin $display("*** TC %0d ECB mode test started.", tc_number); + tc_ctr = tc_ctr + 1; init_key(key, key_length); write_block(block); dump_dut_state(); - write_word(ADDR_CONFIG, (8'h00 + (key_length << 1) + encdec)); + write_word(ADDR_CONFIG, (8'h00 + (key_length << 1)+ encdec)); write_word(ADDR_CTRL, 8'h02); #(100 * CLK_PERIOD); @@ -399,7 +389,6 @@ module tb_aes(); if (result_data == expected) begin - tc_ctr = tc_ctr + 1; $display("*** TC %0d successful.", tc_number); $display(""); end @@ -421,7 +410,7 @@ module tb_aes(); // // Main test task will perform complete NIST test of AES. //---------------------------------------------------------------- - task aes_test(); + task aes_test; reg [255 : 0] nist_aes128_key; reg [255 : 0] nist_aes256_key; @@ -526,7 +515,6 @@ module tb_aes(); //---------------------------------------------------------------- initial begin : main - $display(" -= Testbench for AES started =-"); $display(" =============================="); $display(""); |