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-rw-r--r--src/rtl/aes_key_mem.v170
1 files changed, 72 insertions, 98 deletions
diff --git a/src/rtl/aes_key_mem.v b/src/rtl/aes_key_mem.v
index e681c93..3a4c855 100644
--- a/src/rtl/aes_key_mem.v
+++ b/src/rtl/aes_key_mem.v
@@ -2,7 +2,7 @@
//
// aes_key_mem.v
// -------------
-// The AES key memort including round key generator.
+// The AES key memory including round key generator.
//
//
// Author: Joachim Strombergson
@@ -57,16 +57,16 @@ module aes_key_mem(
//----------------------------------------------------------------
// Parameters.
//----------------------------------------------------------------
- parameter AES_128_BIT_KEY = 1'h0;
- parameter AES_256_BIT_KEY = 1'h1;
+ localparam AES_128_BIT_KEY = 1'h0;
+ localparam AES_256_BIT_KEY = 1'h1;
- parameter AES_128_NUM_ROUNDS = 4'ha;
- parameter AES_256_NUM_ROUNDS = 4'he;
+ localparam AES_128_NUM_ROUNDS = 4'ha;
+ localparam AES_256_NUM_ROUNDS = 4'he;
- parameter CTRL_IDLE = 3'h0;
- parameter CTRL_INIT = 3'h1;
- parameter CTRL_GENERATE = 3'h2;
- parameter CTRL_DONE = 3'h3;
+ localparam CTRL_IDLE = 3'h0;
+ localparam CTRL_INIT = 3'h1;
+ localparam CTRL_GENERATE = 3'h2;
+ localparam CTRL_DONE = 3'h3;
//----------------------------------------------------------------
@@ -133,66 +133,40 @@ module aes_key_mem(
//----------------------------------------------------------------
always @ (posedge clk or negedge reset_n)
begin: reg_update
+ integer i;
+
if (!reset_n)
begin
- key_mem [0] <= 128'h00000000000000000000000000000000;
- key_mem [1] <= 128'h00000000000000000000000000000000;
- key_mem [2] <= 128'h00000000000000000000000000000000;
- key_mem [3] <= 128'h00000000000000000000000000000000;
- key_mem [4] <= 128'h00000000000000000000000000000000;
- key_mem [5] <= 128'h00000000000000000000000000000000;
- key_mem [6] <= 128'h00000000000000000000000000000000;
- key_mem [7] <= 128'h00000000000000000000000000000000;
- key_mem [8] <= 128'h00000000000000000000000000000000;
- key_mem [9] <= 128'h00000000000000000000000000000000;
- key_mem [10] <= 128'h00000000000000000000000000000000;
- key_mem [11] <= 128'h00000000000000000000000000000000;
- key_mem [12] <= 128'h00000000000000000000000000000000;
- key_mem [13] <= 128'h00000000000000000000000000000000;
- key_mem [14] <= 128'h00000000000000000000000000000000;
- prev_key0_reg <= 128'h00000000000000000000000000000000;
- prev_key1_reg <= 128'h00000000000000000000000000000000;
- rcon_reg <= 8'h00;
- ready_reg <= 0;
+ for (i = 0 ; i < 4 ; i = i + 1)
+ key_mem [i] <= 128'h0;
+
+ rcon_reg <= 8'h0;
+ ready_reg <= 1'b0;
round_ctr_reg <= 4'h0;
key_mem_ctrl_reg <= CTRL_IDLE;
end
else
begin
if (round_ctr_we)
- begin
- round_ctr_reg <= round_ctr_new;
- end
+ round_ctr_reg <= round_ctr_new;
if (ready_we)
- begin
- ready_reg <= ready_new;
- end
+ ready_reg <= ready_new;
if (rcon_we)
- begin
- rcon_reg <= rcon_new;
- end
+ rcon_reg <= rcon_new;
if (key_mem_we)
- begin
- key_mem[round_ctr_reg] <= key_mem_new;
- end
+ key_mem[round_ctr_reg] <= key_mem_new;
if (prev_key0_we)
- begin
- prev_key0_reg <= prev_key0_new;
- end
+ prev_key0_reg <= prev_key0_new;
if (prev_key1_we)
- begin
- prev_key1_reg <= prev_key1_new;
- end
+ prev_key1_reg <= prev_key1_new;
if (key_mem_ctrl_we)
- begin
- key_mem_ctrl_reg <= key_mem_ctrl_new;
- end
+ key_mem_ctrl_reg <= key_mem_ctrl_new;
end
end // reg_update
@@ -220,20 +194,20 @@ module aes_key_mem(
reg [31 : 0] rconw, rotstw, tw, trw;
// Default assignments.
- key_mem_new = 128'h00000000000000000000000000000000;
- key_mem_we = 0;
- prev_key0_new = 128'h00000000000000000000000000000000;
- prev_key0_we = 0;
- prev_key1_new = 128'h00000000000000000000000000000000;
- prev_key1_we = 0;
+ key_mem_new = 128'h0;
+ key_mem_we = 1'b0;
+ prev_key0_new = 128'h0;
+ prev_key0_we = 1'b0;
+ prev_key1_new = 128'h0;
+ prev_key1_we = 1'b0;
- k0 = 32'h00000000;
- k1 = 32'h00000000;
- k2 = 32'h00000000;
- k3 = 32'h00000000;
+ k0 = 32'h0;
+ k1 = 32'h0;
+ k2 = 32'h0;
+ k3 = 32'h0;
- rcon_set = 1;
- rcon_next = 0;
+ rcon_set = 1'b1;
+ rcon_next = 1'b0;
// Extract words and calculate intermediate values.
// Perform rotation of sbox word etc.
@@ -247,7 +221,7 @@ module aes_key_mem(
w6 = prev_key1_reg[063 : 032];
w7 = prev_key1_reg[031 : 000];
- rconw = {rcon_reg, 24'h000000};
+ rconw = {rcon_reg, 24'h0};
tmp_sboxw = w7;
rotstw = {new_sboxw[23 : 00], new_sboxw[31 : 24]};
trw = rotstw ^ rconw;
@@ -256,8 +230,8 @@ module aes_key_mem(
// Generate the specific round keys.
if (round_key_update)
begin
- rcon_set = 0;
- key_mem_we = 1;
+ rcon_set = 1'b0;
+ key_mem_we = 1'b1;
case (keylen)
AES_128_BIT_KEY:
begin
@@ -265,8 +239,8 @@ module aes_key_mem(
begin
key_mem_new = key[255 : 128];
prev_key1_new = key[255 : 128];
- prev_key1_we = 1;
- rcon_next = 1;
+ prev_key1_we = 1'b1;
+ rcon_next = 1'b1;
end
else
begin
@@ -277,8 +251,8 @@ module aes_key_mem(
key_mem_new = {k0, k1, k2, k3};
prev_key1_new = {k0, k1, k2, k3};
- prev_key1_we = 1;
- rcon_next = 1;
+ prev_key1_we = 1'b1;
+ rcon_next = 1'b1;
end
end
@@ -288,14 +262,14 @@ module aes_key_mem(
begin
key_mem_new = key[255 : 128];
prev_key0_new = key[255 : 128];
- prev_key0_we = 1;
+ prev_key0_we = 1'b1;
end
else if (round_ctr_reg == 1)
begin
key_mem_new = key[127 : 0];
prev_key1_new = key[127 : 0];
- prev_key1_we = 1;
- rcon_next = 1;
+ prev_key1_we = 1'b1;
+ rcon_next = 1'b1;
end
else
begin
@@ -312,15 +286,15 @@ module aes_key_mem(
k1 = w1 ^ w0 ^ tw;
k2 = w2 ^ w1 ^ w0 ^ tw;
k3 = w3 ^ w2 ^ w1 ^ w0 ^ tw;
- rcon_next = 1;
+ rcon_next = 1'b1;
end
// Store the generated round keys.
key_mem_new = {k0, k1, k2, k3};
prev_key1_new = {k0, k1, k2, k3};
- prev_key1_we = 1;
+ prev_key1_we = 1'b1;
prev_key0_new = prev_key1_reg;
- prev_key0_we = 1;
+ prev_key0_we = 1'b1;
end
end
@@ -342,20 +316,20 @@ module aes_key_mem(
begin : rcon_logic
reg [7 : 0] tmp_rcon;
rcon_new = 8'h00;
- rcon_we = 0;
+ rcon_we = 1'b0;
tmp_rcon = {rcon_reg[6 : 0], 1'b0} ^ (8'h1b & {8{rcon_reg[7]}});
if (rcon_set)
begin
rcon_new = 8'h8d;
- rcon_we = 1;
+ rcon_we = 1'b1;
end
if (rcon_next)
begin
- rcon_new = tmp_rcon[7 : 0];
- rcon_we = 1;
+ rcon_new = tmp_rcon[7 : 0];
+ rcon_we = 1'b1;
end
end
@@ -368,18 +342,18 @@ module aes_key_mem(
always @*
begin : round_ctr
round_ctr_new = 4'h0;
- round_ctr_we = 0;
+ round_ctr_we = 1'b0;
if (round_ctr_rst)
begin
round_ctr_new = 4'h0;
- round_ctr_we = 1;
+ round_ctr_we = 1'b1;
end
else if (round_ctr_inc)
begin
round_ctr_new = round_ctr_reg + 1'b1;
- round_ctr_we = 1;
+ round_ctr_we = 1'b1;
end
end
@@ -420,50 +394,50 @@ module aes_key_mem(
always @*
begin: key_mem_ctrl
// Default assignments.
- ready_new = 0;
- ready_we = 0;
- round_key_update = 0;
- round_ctr_rst = 0;
- round_ctr_inc = 0;
+ ready_new = 1'b0;
+ ready_we = 1'b0;
+ round_key_update = 1'b0;
+ round_ctr_rst = 1'b0;
+ round_ctr_inc = 1'b0;
key_mem_ctrl_new = CTRL_IDLE;
- key_mem_ctrl_we = 0;
+ key_mem_ctrl_we = 1'b0;
case(key_mem_ctrl_reg)
CTRL_IDLE:
begin
if (init)
begin
- ready_new = 0;
- ready_we = 1;
+ ready_new = 1'b0;
+ ready_we = 1'b1;
key_mem_ctrl_new = CTRL_INIT;
- key_mem_ctrl_we = 1;
+ key_mem_ctrl_we = 1'b1;
end
end
CTRL_INIT:
begin
- round_ctr_rst = 1;
+ round_ctr_rst = 1'b1;
key_mem_ctrl_new = CTRL_GENERATE;
- key_mem_ctrl_we = 1;
+ key_mem_ctrl_we = 1'b1;
end
CTRL_GENERATE:
begin
- round_ctr_inc = 1;
- round_key_update = 1;
+ round_ctr_inc = 1'b1;
+ round_key_update = 1'b1;
if (round_ctr_reg == num_rounds)
begin
key_mem_ctrl_new = CTRL_DONE;
- key_mem_ctrl_we = 1;
+ key_mem_ctrl_we = 1'b1;
end
end
CTRL_DONE:
begin
- ready_new = 1;
- ready_we = 1;
+ ready_new = 1'b1;
+ ready_we = 1'b1;
key_mem_ctrl_new = CTRL_IDLE;
- key_mem_ctrl_we = 1;
+ key_mem_ctrl_we = 1'b1;
end
default:
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-03 22:45:53 +0000