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Diffstat (limited to 'src/rtl/aes_encipher_block.v')
-rw-r--r--src/rtl/aes_encipher_block.v158
1 files changed, 71 insertions, 87 deletions
diff --git a/src/rtl/aes_encipher_block.v b/src/rtl/aes_encipher_block.v
index 2761d5b..14c79b2 100644
--- a/src/rtl/aes_encipher_block.v
+++ b/src/rtl/aes_encipher_block.v
@@ -60,23 +60,23 @@ module aes_encipher_block(
//----------------------------------------------------------------
// Internal constant and parameter definitions.
//----------------------------------------------------------------
- parameter AES_128_BIT_KEY = 1'h0;
- parameter AES_256_BIT_KEY = 1'h1;
+ localparam AES_128_BIT_KEY = 1'h0;
+ localparam AES_256_BIT_KEY = 1'h1;
- parameter AES128_ROUNDS = 4'ha;
- parameter AES256_ROUNDS = 4'he;
+ localparam AES128_ROUNDS = 4'ha;
+ localparam AES256_ROUNDS = 4'he;
- parameter NO_UPDATE = 3'h0;
- parameter INIT_UPDATE = 3'h1;
- parameter SBOX_UPDATE = 3'h2;
- parameter MAIN_UPDATE = 3'h3;
- parameter FINAL_UPDATE = 3'h4;
+ localparam NO_UPDATE = 3'h0;
+ localparam INIT_UPDATE = 3'h1;
+ localparam SBOX_UPDATE = 3'h2;
+ localparam MAIN_UPDATE = 3'h3;
+ localparam FINAL_UPDATE = 3'h4;
- parameter CTRL_IDLE = 3'h0;
- parameter CTRL_INIT = 3'h1;
- parameter CTRL_SBOX = 3'h2;
- parameter CTRL_MAIN = 3'h3;
- parameter CTRL_FINAL = 3'h4;
+ localparam CTRL_IDLE = 3'h0;
+ localparam CTRL_INIT = 3'h1;
+ localparam CTRL_SBOX = 3'h2;
+ localparam CTRL_MAIN = 3'h3;
+ localparam CTRL_FINAL = 3'h4;
//----------------------------------------------------------------
@@ -216,56 +216,40 @@ module aes_encipher_block(
begin: reg_update
if (!reset_n)
begin
- block_w0_reg <= 32'h00000000;
- block_w1_reg <= 32'h00000000;
- block_w2_reg <= 32'h00000000;
- block_w3_reg <= 32'h00000000;
+ block_w0_reg <= 32'h0;
+ block_w1_reg <= 32'h0;
+ block_w2_reg <= 32'h0;
+ block_w3_reg <= 32'h0;
sword_ctr_reg <= 2'h0;
round_ctr_reg <= 4'h0;
- ready_reg <= 1;
+ ready_reg <= 1'b1;
enc_ctrl_reg <= CTRL_IDLE;
end
else
begin
if (block_w0_we)
- begin
- block_w0_reg <= block_new[127 : 096];
- end
+ block_w0_reg <= block_new[127 : 096];
if (block_w1_we)
- begin
- block_w1_reg <= block_new[095 : 064];
- end
+ block_w1_reg <= block_new[095 : 064];
if (block_w2_we)
- begin
- block_w2_reg <= block_new[063 : 032];
- end
+ block_w2_reg <= block_new[063 : 032];
if (block_w3_we)
- begin
- block_w3_reg <= block_new[031 : 000];
- end
+ block_w3_reg <= block_new[031 : 000];
if (sword_ctr_we)
- begin
- sword_ctr_reg <= sword_ctr_new;
- end
+ sword_ctr_reg <= sword_ctr_new;
if (round_ctr_we)
- begin
- round_ctr_reg <= round_ctr_new;
- end
+ round_ctr_reg <= round_ctr_new;
if (ready_we)
- begin
- ready_reg <= ready_new;
- end
+ ready_reg <= ready_new;
if (enc_ctrl_we)
- begin
- enc_ctrl_reg <= enc_ctrl_new;
- end
+ enc_ctrl_reg <= enc_ctrl_new;
end
end // reg_update
@@ -280,12 +264,12 @@ module aes_encipher_block(
reg [127 : 0] old_block, shiftrows_block, mixcolumns_block;
reg [127 : 0] addkey_init_block, addkey_main_block, addkey_final_block;
- block_new = 128'h00000000000000000000000000000000;
- muxed_sboxw = 32'h00000000;
- block_w0_we = 0;
- block_w1_we = 0;
- block_w2_we = 0;
- block_w3_we = 0;
+ block_new = 128'h0;
+ muxed_sboxw = 32'h0;
+ block_w0_we = 1'b0;
+ block_w1_we = 1'b0;
+ block_w2_we = 1'b0;
+ block_w3_we = 1'b0;
old_block = {block_w0_reg, block_w1_reg, block_w2_reg, block_w3_reg};
shiftrows_block = shiftrows(old_block);
@@ -298,10 +282,10 @@ module aes_encipher_block(
INIT_UPDATE:
begin
block_new = addkey_init_block;
- block_w0_we = 1;
- block_w1_we = 1;
- block_w2_we = 1;
- block_w3_we = 1;
+ block_w0_we = 1'b1;
+ block_w1_we = 1'b1;
+ block_w2_we = 1'b1;
+ block_w3_we = 1'b1;
end
SBOX_UPDATE:
@@ -312,25 +296,25 @@ module aes_encipher_block(
2'h0:
begin
muxed_sboxw = block_w0_reg;
- block_w0_we = 1;
+ block_w0_we = 1'b1;
end
2'h1:
begin
muxed_sboxw = block_w1_reg;
- block_w1_we = 1;
+ block_w1_we = 1'b1;
end
2'h2:
begin
muxed_sboxw = block_w2_reg;
- block_w2_we = 1;
+ block_w2_we = 1'b1;
end
2'h3:
begin
muxed_sboxw = block_w3_reg;
- block_w3_we = 1;
+ block_w3_we = 1'b1;
end
endcase // case (sbox_mux_ctrl_reg)
end
@@ -338,19 +322,19 @@ module aes_encipher_block(
MAIN_UPDATE:
begin
block_new = addkey_main_block;
- block_w0_we = 1;
- block_w1_we = 1;
- block_w2_we = 1;
- block_w3_we = 1;
+ block_w0_we = 1'b1;
+ block_w1_we = 1'b1;
+ block_w2_we = 1'b1;
+ block_w3_we = 1'b1;
end
FINAL_UPDATE:
begin
block_new = addkey_final_block;
- block_w0_we = 1;
- block_w1_we = 1;
- block_w2_we = 1;
- block_w3_we = 1;
+ block_w0_we = 1'b1;
+ block_w1_we = 1'b1;
+ block_w2_we = 1'b1;
+ block_w3_we = 1'b1;
end
default:
@@ -424,66 +408,66 @@ module aes_encipher_block(
num_rounds = AES128_ROUNDS;
end
- sword_ctr_inc = 0;
- sword_ctr_rst = 0;
- round_ctr_inc = 0;
- round_ctr_rst = 0;
- ready_new = 0;
- ready_we = 0;
+ sword_ctr_inc = 1'b0;
+ sword_ctr_rst = 1'b0;
+ round_ctr_inc = 1'b0;
+ round_ctr_rst = 1'b0;
+ ready_new = 1'b0;
+ ready_we = 1'b0;
update_type = NO_UPDATE;
enc_ctrl_new = CTRL_IDLE;
- enc_ctrl_we = 0;
+ enc_ctrl_we = 1'b0;
case(enc_ctrl_reg)
CTRL_IDLE:
begin
if (next)
begin
- round_ctr_rst = 1;
- ready_new = 0;
- ready_we = 1;
+ round_ctr_rst = 1'b1;
+ ready_new = 1'b0;
+ ready_we = 1'b1;
enc_ctrl_new = CTRL_INIT;
- enc_ctrl_we = 1;
+ enc_ctrl_we = 1'b1;
end
end
CTRL_INIT:
begin
- round_ctr_inc = 1;
- sword_ctr_rst = 1;
+ round_ctr_inc = 1'b1;
+ sword_ctr_rst = 1'b1;
update_type = INIT_UPDATE;
enc_ctrl_new = CTRL_SBOX;
- enc_ctrl_we = 1;
+ enc_ctrl_we = 1'b1;
end
CTRL_SBOX:
begin
- sword_ctr_inc = 1;
+ sword_ctr_inc = 1'b1;
update_type = SBOX_UPDATE;
if (sword_ctr_reg == 2'h3)
begin
enc_ctrl_new = CTRL_MAIN;
- enc_ctrl_we = 1;
+ enc_ctrl_we = 1'b1;
end
end
CTRL_MAIN:
begin
- sword_ctr_rst = 1;
- round_ctr_inc = 1;
+ sword_ctr_rst = 1'b1;
+ round_ctr_inc = 1'b1;
if (round_ctr_reg < num_rounds)
begin
update_type = MAIN_UPDATE;
enc_ctrl_new = CTRL_SBOX;
- enc_ctrl_we = 1;
+ enc_ctrl_we = 1'b1;
end
else
begin
update_type = FINAL_UPDATE;
- ready_new = 1;
- ready_we = 1;
+ ready_new = 1'b1;
+ ready_we = 1'b1;
enc_ctrl_new = CTRL_IDLE;
- enc_ctrl_we = 1;
+ enc_ctrl_we = 1'b1;
end
end
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