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Title: Project Status Dashboard Date: 2016-12-15 22:44

Product Component Requirements

State Component DNSsec Signing Let's Encrypt Tor Consensus Internal Ticket
Done AES / KEY WRAP Wrap/Bkup #17
ECDSA p256 secondary Yes
ECDSA p384 secondary ?
Testing PKCS#11 Yes Yes Yes Yes #14
Done RSA Yes Yes Yes #16
Done SHA-1 Yes
Done SHA-256 Yes Yes Yes
Done SHA-384 Yes ?
Done TRNG padding padding padding KeyGen #15

Novena Alpha - DNSsec Only

Component Who About When Ticket
RSA Pavel, Rob Done #16
AES/KEY WRAP Rob Done #17
SHA-256 Joachim Done
TRNG FT Done #15
PKCS#11 Rob Late May
PKCS#11 PIN Rob Mid June #14
Packaging Paul, Rob Done

Hardware cores

Hash Functions

Component Status Repository Comment
SHA-1 Done core/hash/sha1
SHA-256 Done core/hash/sha256
SHA-512 Done core/hash/sha512 Support all four SHA-512/x modes defined in FIPS 180-4.
SHA-3 (Keccak ) Started core/hash/sha3
GOST R 34.11-2012 Started

Symmetric Crypto

Component Status Repository Comment
AES Done core/cipher/aes AES cipher core with support for 128 and 256 bit keys.
ChaCha Done core/cipher/chacha High speed stream cipher. Based on the Salsa20 stream cipher.

Asymmetric Crypto

Component Status Repository Comment
ModExp -8192 (RSA) Done core/math/modexps6
Curve25519 Started
Ed25519 Not started
P-256, P-384 ECDSA Started
GOST R 34.10-2001 Started https://git.cryptech.is/user/shatov/gost/streebog Core in provisional repo. Will be moved to the the hash core section.

Random Number Generators

Component Status Repository Comment
TRNG Done core/rng/trng Depends on SHA-512 and ChaCha
External Avalanche Entropy Done core/rng/avalanche_entropy Hardware and stand-alone PoC
Internal Ring Oscillator Done core/rng/rosc_entropy

Key wrapping and Cipher Modes

Component Status Repository Comment
KEY WRAP Done Key wrapping mode. Will be used for key storage. See rfc 3394. #17
GCM Not started Galois Counter Mode. AEAD cipher.
CTR and CBC Not started Basic block cipher modes.

Support Functionality

Component Status Repository Comment
Coretest Done core/comm/coretest Command-response based core tester for HW accelerated core verification.
UART Done core/comm/uart Serial interface module used on the TerasIC C5G development board.
I2C Done core/comm/i2c I2C interface module used on the Novena board.
EIM Done core/comm/eim Interface for the Freescale EIM memory interface used on the Novena board.
FMC Done core/comm/fmc Interface for the STM32 FMC memory interface used on the dev-bridge and Alpha boards.