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Diffstat (limited to 'pelican/content/AlphaBoardComponents.md')
| -rw-r--r-- | pelican/content/AlphaBoardComponents.md | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/pelican/content/AlphaBoardComponents.md b/pelican/content/AlphaBoardComponents.md index 9cd79f6..2e005a0 100644 --- a/pelican/content/AlphaBoardComponents.md +++ b/pelican/content/AlphaBoardComponents.md @@ -118,9 +118,7 @@ No external RAM or Flash memories for FPGA application functionality shall be pr * The Master Key Memory (MKM) is a serial SRAM memory. * The MKM is connected to the FPGA with a SPI interface. - The MKM is connected to the Tamper Sub System with the same SPI interface. - * The FPGA can read and write to the memory. * The Tamper Sub System controller can read and writeto the memory. Optionally the MISO input wire to the Tamper Sub System can be tied low by setting using a jumper. This should cause the tamper controller to only read zeros from the memory and thus only be able to write to the memory. The Tamper Sub System Controller has strict priority over the CPU. Basically an external switch between the memory, the controller and CPU. * The MKM is powered by a separate power supply using a CR2032 cell battery. The VCC pin connected to the battery should be under control from the Tamper Sub System controller. A transistor or analog switch controlled by the Tamper Sub System controller. @@ -144,10 +142,10 @@ Suggested components for the MKM and the switch: * The avalanche noise entropy source should be implemented according to [existing schematics]({attach}AlphaBoardComponents/alpha_board_noise_source.pdf). * The noise source should have a shielding can and suitable ground plane etc. to keep radiation of entropy bits as low as possible. * The "12-15v stable" VCC should be controllable by the FPGA (enable/disable controlled by output pin on FPGA) to increase life time of components. - Power requirements for this VCC is < 100 mA (needs measuring, but probably < 50 mA). + # Processor Sub System ### CPU @@ -196,13 +194,11 @@ The STM32 CPU supports two separate SDRAM banks. We use both of them with as big ### Real Time Clock * Battery backed RTC with calendar/date information. - Connected to the CPU via serial, SPI or other interface. - * Suggested chip: Microchip MCP79411 or MCP79412 connected to the CPU via I2C. - <http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411> + <http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf> This chip requires an external 32 kHz crystal. @@ -279,9 +275,7 @@ The Tamper Sub System on the Alpha Board is simplistic and does not do a lot of * A simple 8-bit MCU. Atmel AVR. * Suggested chip: ATTINY828R-AU. Has 28 GPIOs which is definitely more than we've used for this design. * The Tamper Detection Sub System Controlller may need a separate 32 kHz crystal for periodical wake up. - (The MCU should be able to wake up based on internal clock source.) - * The JTAG interface for debug and firmware download should be accessible via a header. * The MCU should at least have four LEDs under GPIO control to allow heartbeat, status and debug signalling. |