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authorRob Austein <sra@hactrn.net>2021-02-14 16:01:15 +0000
committerRob Austein <sra@hactrn.net>2021-02-14 16:01:15 +0000
commite18e5b3d2559f5f0395ffe79416cdca3abc89310 (patch)
tree340bdc43c4bfa7bcc3c048eea4db848cabe470de /wiki/Hardware.trac
parentad1cc0517983e599897929b4c94463bf2af78f7c (diff)
Start restructuring for Pelican
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+= Cryptech Hardware =
+
+== Generation 1 ==
+
+Various generic FPGA development boards.
+
+== Generation 2 ==
+
+//[wiki:CoretestHashesNovena Novena]//
+
+== Generation 3 ==
+
+An Alpha version of a !CrypTech HSM, currently in early design
+
+[[Image(cryptech-g3.png)]]
+
+There is no real tamper wrapping and no tamper sensors. The tamper switch is used to simulate tamper detection to test the system's tamper reaction(s).
+
+For the ARM, we think we want
+ * No or minimal magic blobs because it's inside the security boundary
+ * Support for booting, flash file system, and USB
+ * Do not need memory protection or allocation, threads, video or sound or ...
+ * Some speed, but the crypto is done in the FPGA
+ * All components must be free of any GPL-like virus or restrictions
+
+[wiki:AlphaBoardComponents The BOM and board requirements for the alpha board].