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author | Rob Austein <sra@hactrn.net> | 2020-09-13 23:15:43 +0000 |
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committer | Rob Austein <sra@hactrn.net> | 2020-09-13 23:21:33 +0000 |
commit | 13d0f55865f8b1b851ce1e84597b144c5fd41662 (patch) | |
tree | 7b6ff6916f6596f64ec0d2657ae040abd5e18ed9 /raw-wiki-dump/GitRepositories%2Ftest%2Fnovena_i2c_simple.md | |
parent | 3aa8b1dd6e0f504ef83da99f8c9cdb2532f948f5 (diff) |
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diff --git a/raw-wiki-dump/GitRepositories%2Ftest%2Fnovena_i2c_simple.md b/raw-wiki-dump/GitRepositories%2Ftest%2Fnovena_i2c_simple.md deleted file mode 100644 index eab8f08..0000000 --- a/raw-wiki-dump/GitRepositories%2Ftest%2Fnovena_i2c_simple.md +++ /dev/null @@ -1,46 +0,0 @@ -``` -#!htmlcomment - -This page is maintained automatically by a script. Don't modify this page by hand, -your changes will just be overwritten the next time the script runs. Talk to your -Friendly Neighborhood Repository Maintainer if you need to change something here. - -``` - -``` -#!html -<h1>novena_i2c_simple</h1> - -<p>The coretest system for the Novena PVT1, over I2C, with simplified -user interface.</p> - -<h2>Introduction</h2> - -<p>This variant of novena_i2c provides a more intuitive, more compact, -and more efficient user interface - just write() the block data, and -read() the digest. All signalling to/from the hash cores is implicit -and handled by the SHA wrapper cores.</p> - -<p>Repeated writes to the same SHA core will be added to the same digest; -the act of reading the digest resets the internal state, so that the -next write will start a new digest.</p> - -<p>Each hash algorithm is a separate virtual I2C device on bus 2, with -the following device addresses: - SHA-1 0x1e - SHA-256 0x1f - SHA-512/224 0x20 - SHA-512/256 0x21 - SHA-384 0x22 - SHA-512 0x23</p> - -<h2>Status</h2> - -<p><strong><em>(2014-09-18)</em></strong> -Initial version. Built using Xilinx ISE 14.3.</p> -``` - -[[RepositoryIndex(format=table,glob=test/novena_i2c_simple)]] - -| Clone `https://git.cryptech.is/test/novena_i2c_simple.git` | -|---| |