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author | Rob Austein <sra@hactrn.net> | 2020-09-13 23:04:30 +0000 |
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committer | Rob Austein <sra@hactrn.net> | 2020-09-13 23:04:30 +0000 |
commit | b092ffbcbe2c9398494f7dc9db6f0796971633e0 (patch) | |
tree | 6fabf690f1ebf485a9fea9af5298e44ad2a59a3e /raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy | |
parent | 9d927e49d9c10fc16c6dfa4a2a96cdb6216e4e2b (diff) |
Import Cryptech wiki dump
Diffstat (limited to 'raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy')
-rw-r--r-- | raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy b/raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy new file mode 100644 index 0000000..bf38287 --- /dev/null +++ b/raw-wiki-dump/GitRepositories%2Fcore%2Frng%2Favalanche_entropy @@ -0,0 +1,54 @@ +{{{ +#!htmlcomment + +This page is maintained automatically by a script. Don't modify this page by hand, +your changes will just be overwritten the next time the script runs. Talk to your +Friendly Neighborhood Repository Maintainer if you need to change something here. + +}}} + +{{{ +#!html +<h1>avalanche_entropy</h1> + +<p>Entropy provider core for an external avalanche noise based entropy source.</p> + +<h2>Functional Description</h2> + +<p>This core samples noise provided on an input pin. The noise is expected +to be 'digital' that is fairly rapidly move from voltage levels +matching ones and zeros as handled by the digital process used to +implement the core.</p> + +<p>The noise is sampled with double registers. Then phase detection is +applied to find positive flanks. The core contains a free running clock +(clocked at the provided core clock frequency). When a positive flank in +the noise is detected, the LSB of the clock is sampled and added to a +shift registers. When at least 32 bits has been collected, the result is +presented as entropy available to any entropy consumer connected to the +core.</p> + +<p>The core also includes a delta time counter. This counter is used for +testing of the core and is available via the API.</p> + +<p>The fact that the core uses the flank of the to drive the entropy bit +generation, but that the timing between the flanks means that if +the noise source have a bias for zero or one state does not affect which +entropy bits are generated.</p> + +<h2>Implementation Status</h2> + +<p>The core has been tested with several revisions of the Cryptech +avalanche noise board. The core has been implemented in Altera +Cyclone-IV and Cyclone-V devices as well as in Xilinx Spartan-6 +devices. The core clock frequency used has been 25 MHz, 33 MHz and 50 +MHz.</p> + +<p>The generated entropy has been extensively tested (using the ent tool as +well as other custom tools) and found to be generating entropy with good +quality.</p> +}}} + +[[RepositoryIndex(format=table,glob=core/rng/avalanche_entropy)]] + +|| Clone `https://git.cryptech.is/core/rng/avalanche_entropy.git` || |