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authorRob Austein <sra@hactrn.net>2020-09-13 23:06:24 +0000
committerRob Austein <sra@hactrn.net>2020-09-13 23:06:24 +0000
commit891730d13b324fad916572a82f0bd610c5de9aad (patch)
treef46c94ddfff34f15aafe7cac0596716d1c13c412 /raw-wiki-dump/GitRepositories%2Fcore%2Fmath%2Fecdsalib
parentb092ffbcbe2c9398494f7dc9db6f0796971633e0 (diff)
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-{{{
-#!htmlcomment
-
-This page is maintained automatically by a script. Don't modify this page by hand,
-your changes will just be overwritten the next time the script runs. Talk to your
-Friendly Neighborhood Repository Maintainer if you need to change something here.
-
-}}}
-
-{{{
-#!html
-<h1>ecdsalib</h1>
-
-<h2>Core Description</h2>
-
-<p>This is a library of code common to the ecdsa256 and ecdsa384 cores. See documentation of those cores for details.</p>
-
-<p>This code was originally repelicated in both of the above cores, but the Xilinx synthesis tools got tetchy about that when trying to build a single image containing both cores.</p>
-
-<h2>Vendor-specific Primitives</h2>
-
-<p>Cryptech Alpha platform is based on Xilinx Artix-7 200T FPGA, so this core takes advantage of Xilinx-specific DSP slices to carry out math-intensive operations. All vendor-specific math primitives are placed under /rtl/lowlevel/artix7, the core also offers generic replacements under /rtl/lowlevel/generic, they can be used for simulation with 3rd party tools, that are not aware of Xilinx-specific stuff. Selection of vendor/generic primitives is done in ecdsa_lowlevel_settings.v, when porting to other architectures, only those four low-level modules need to be ported.</p>
-}}}
-
-[[RepositoryIndex(format=table,glob=core/math/ecdsalib)]]
-
-|| Clone `https://git.cryptech.is/core/math/ecdsalib.git` ||