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authorRob Austein <sra@hactrn.net>2021-02-15 23:28:19 +0000
committerRob Austein <sra@hactrn.net>2021-02-15 23:28:19 +0000
commita255b67f6d487703db648c58ee1e50c0aa85c2a6 (patch)
tree34d85d7423606178370a057e0fd291b2ebdb248b /pelican/content/StateOfPlay.md
parent7acac1b6d1d8fbbe4b3c407be891f8bf65120c93 (diff)
Get inter-page links right
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@@ -53,7 +53,7 @@ fits together.
At this point I have figured out how to build two different FPGA
images for the Novena PVT1. In both cases, I'm using the Makefile
-rather than attempting to use the [XiLinx](XiLinx.md) GUI environment.
+rather than attempting to use the [XiLinx]({filename}XiLinx.md) GUI environment.
* `core/novena` builds the current set of digest cores into a