path: root/raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim.trac

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<h1>eim</h1>

<p>Verilog implementation of the eim interface used to connect FPGA cores
to the Freescale i.MX6 CPU.</p>
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[[RepositoryIndex(format=table,glob=core/comm/eim)]]

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