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<h1>ecdh_model_fpga</h1>
<p>This reference model was written to help debug Verilog code, it mimics how an FPGA would do elliptic curve point scalar multiplication for ECDH using curves P-256 and P-384. Note, that the model may do weird (from CPU point of view, of course) things at times. Another important thing is that while FPGA modules are actually written to operate in constant-time manner, this model itself doesn't take any active measures to keep run-time constant. Do <strong>NOT</strong> use it in production as-is!</p>
<p>The model is split into 4 layers:</p>
<ul>
<li>Low-level primitives (32- and 48-bit adders, 32-bit subtractor, 16x16-bit multiplier, 48-bit accumulator)</li>
<li>Utility routines (copier, comparator)</li>
<li>Modular arithmetic (adder, subtractor, multiplier, invertor)</li>
<li>EC arithmetic (adder, doubler, multiplier)</li>
</ul>
<p>Modular multiplier and invertor use complex algorithms and are thus further split into "helper" sub-routines.</p>
<p>This model uses tips and tricks from the following sources:</p>
<ol>
<li><a href="http://diamond.boisestate.edu/~liljanab/MATH308/GuideToECC.pdf">Guide to Elliptic Curve Cryptography</a></li>
<li><a href="https://www.iacr.org/archive/ches2008/51540064/51540064.pdf">Ultra High Performance ECC over NIST Primes
on Commercial FPGAs</a></li>
<li><a href="http://joppebos.com/files/CTInversion.pdf">Constant Time Modular Inversion</a></li>
</ol>
}}}
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