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@@ -53,7 +53,7 @@ fits together.
At this point I have figured out how to build two different FPGA
images for the Novena PVT1. In both cases, I'm using the Makefile
-rather than attempting to use the [XiLinx]({filename}XiLinx.md) GUI environment.
+rather than attempting to use the XiLinx GUI environment.
* `core/novena` builds the current set of digest cores into a