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Diffstat (limited to 'pelican/content/CoretestHashesC5G.md')
| -rw-r--r-- | pelican/content/CoretestHashesC5G.md | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/pelican/content/CoretestHashesC5G.md b/pelican/content/CoretestHashesC5G.md index 381fba8..117fd6c 100644 --- a/pelican/content/CoretestHashesC5G.md +++ b/pelican/content/CoretestHashesC5G.md @@ -49,18 +49,18 @@ interface connected to a FPGA device. The subsystem consists of: - [coretest](https://git.cryptech.is/core/coretest): A command parser that accepts read/write commands from a - host, executes the commands and sends the response. + - [uart](https://git.cryptech.is/core/usrt): A simple serial interface that connects coretest to the host. - [coretest_hashes](https://git.cryptech.is/core/coretest_hashes): A top level wrapper that connects all the cores as - well as connecting the rxd and txd ports on the uart to external pins as well as clk and reset. This core repo also contains the Python command line program hash_tester we will be using to talk to coretester and perform tests of the sha1 and sha256 cores. +  *The coretest_hashes subsystem with sha1 and sha256 cores. The system is connected to a host computer via a serial interface.* @@ -157,18 +157,18 @@ sha1.v sha1_core.v sha1_w_mem.v These files are: - sha1.v: A top level wrapper that provides an interface to the core. In - this case a 32-bit memory like interface. + - sha1_core.v: The actual SHA-1 hash function core. - sha1_w_mem.v: The W memory including sliding window functionality used - by the core. + The other cores follows a similar pattern with a top level wrapper named <core_name>.v, the main functionality in <core_name>_core.v and then one or more submodules. @@ -177,24 +177,24 @@ or more submodules. ## Creating the project in Quartus - Start Quartus and select file/new... and select New Quartus II - Project. -- Select destination directory to be toolruns/ in your project +- Select destination directory to be toolruns/ in your project directory. + - Set 'coretest_hashes' as name of the project - Set 'coretest_hashes' as nem of the top level design entity. (Should be - done automatically when entering the name of the project.) + - Press next. @@ -208,32 +208,32 @@ or more submodules. - Select coretest and press 'Open'. (Note: Quartus seems to sometimes omit the .v suffix - for the files depending on Windows/OS version.) -- Back on the 'Add Files' page. Press Add to actually add coretest to +- Back on the 'Add Files' page. Press Add to actually add coretest to the project. -- Press '...' again and navigate to the rtl directory in +- Press '...' again and navigate to the rtl directory in coretest_hashes. Add it like you did with coretest. -- Navigate to test_coretest_hashes/cores/sha1/src/rtl and add the files sha1, sha1_core, +- Navigate to test_coretest_hashes/cores/sha1/src/rtl and add the files sha1, sha1_core, sha1_w_mem. This time you don't need to press 'Add' on the 'Add Files'. It is done automatically when adding more than one file at a time. -- Navigate to test_coretest_hashes/cores/sha256/src/rtl and add the files sha256, sha256_core, +- Navigate to test_coretest_hashes/cores/sha256/src/rtl and add the files sha256, sha256_core, sha256_k_constants, sha256_w_mem. Do **NOT** add the file wb_sha256. This file contains an alternative top level wrapper to the one in sha256.v that instead provides a [WISHBONE](http://opencores.org/opencores,wishbone) interface. This interface is not used in the coretest_hashes design. + - Finally navigate to test_coretest_hashes/cores/uart/src/rtl and add uart, uart_core. @@ -293,10 +293,10 @@ also a pin list available in the coretest_hashes directory. - The file coretest_hashes.qsf contains assignments for a project like - the one we are setting up. It contains the pin assignments. The follwing list is a slightly cleaned up version of the pin assignments: + ``` set_location_assignment PIN_R20 -to clk set_location_assignment PIN_P11 -to reset_n |