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Diffstat (limited to 'pelican/content/AlphaBoardComponents.md')
| -rw-r--r-- | pelican/content/AlphaBoardComponents.md | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/pelican/content/AlphaBoardComponents.md b/pelican/content/AlphaBoardComponents.md index fe6ac6b..f23477a 100644 --- a/pelican/content/AlphaBoardComponents.md +++ b/pelican/content/AlphaBoardComponents.md @@ -7,7 +7,7 @@ This document contains a list of component level description and requirements fo The document is to be used as a BOM (Bill Of Materials) and PCB design requirement description for discussing with PCB designers on what we want to have designed. -The block diagram for the Alpha board can be seen at: [Hardware](Hardware) +The block diagram for the Alpha board can be seen at: [Hardware](Hardware.md) The Alpha board basically consists of three major sub systems: @@ -31,7 +31,7 @@ The Alpha board basically consists of three major sub systems: The Alpha board should preferably be a single board with all three sub systems on the same board. -We are currently using the [Novena] board, and the Alpha board CPU Sub System functionality from is based on the Novena. We also have a trust in the [http://www.imx6rex.com/ "iMX6 Rex"](http://www.kosagi.com/w/index.php?title=Novena_Main_Page) board. Using the the Novena and/or iMX6 Rex as basis for the Alpha board design might (should) be a good way forward. +We are currently using the [Novena](http://www.kosagi.com/w/index.php?title=Novena_Main_Page) board, and the Alpha board CPU Sub System functionality from is based on the Novena. We also have a trust in the [iMX6 Rex](http://www.imx6rex.com/) board. Using the the Novena and/or iMX6 Rex as basis for the Alpha board design might (should) be a good way forward. ### Authors and timeline/revision history @@ -106,7 +106,7 @@ The FPGA pad layout should be compatible with the Xilinx Artix-7 FGG484 used by * Suggestion for FPGA config memory is [M25P128 EEPROM from Micron](http://www.micron.com/parts/nor-flash/serial-nor-flash/m25p128-vme6gb), with a jumper controlling the write-enable pin. -* Suggested MUX is the Quad 2-channel Analog Switch: ON Semi. MC14551B [http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF](http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF) +* Suggested MUX is the Quad 2-channel Analog Switch: ON Semi. MC14551B [http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF] @@ -130,13 +130,13 @@ Suggested components for the MKM and the switch: * Memory: Microchip serial SRAM. 23A640, 8 kByte, 8-TSSOP or 8-SOIC -[http://ww1.microchip.com/downloads/en/DeviceDoc/22127a.pdf](http://ww1.microchip.com/downloads/en/DeviceDoc/22127a.pdf) +[http://ww1.microchip.com/downloads/en/DeviceDoc/22127a.pdf] * Quad 2-channel Analog Switch: ON Semi. MC14551B -[http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF](http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF) +[http://www.onsemi.com/pub_link/Collateral/MC14551B-D.PDF] ### Entropy Sources @@ -201,9 +201,9 @@ The STM32 CPU supports two separate SDRAM banks. We use both of them with as big * Suggested chip: Microchip MCP79411 or MCP79412 connected to the CPU via I2C. - [http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411](http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411) + [http://www.microchip.com/wwwproducts/Devices.aspx?product=MCP79411] - [http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf](http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf) + [http://ww1.microchip.com/downloads/en/DeviceDoc/20002266G.pdf] This chip requires an external 32 kHz crystal. |