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| author | Rob Austein <sra@hactrn.net> | 2020-09-13 23:06:24 +0000 |
|---|---|---|
| committer | Rob Austein <sra@hactrn.net> | 2020-09-13 23:06:24 +0000 |
| commit | 891730d13b324fad916572a82f0bd610c5de9aad (patch) | |
| tree | f46c94ddfff34f15aafe7cac0596716d1c13c412 /raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle | |
| parent | b092ffbcbe2c9398494f7dc9db6f0796971633e0 (diff) | |
Rename for conversion
Diffstat (limited to 'raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle')
| -rw-r--r-- | raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle b/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle deleted file mode 100644 index 5c7d4d2..0000000 --- a/raw-wiki-dump/GitRepositories%2Fuser%2Fjs%2Ftoggle +++ /dev/null @@ -1,30 +0,0 @@ -{{{ -#!htmlcomment - -This page is maintained automatically by a script. Don't modify this page by hand, -your changes will just be overwritten the next time the script runs. Talk to your -Friendly Neighborhood Repository Maintainer if you need to change something here. - -}}} - -{{{ -#!html -<h1>toggle</h1> - -<h2>Introduction</h2> - -<p>This repo contains a simple deign that toggles an ouput pin. The toggle -is in sync with the given sys_clk, but the toggle circuit divides down -the clock. The divisor is build time defined.</p> - -<p>The design is used in the Cryptech FPGA design to observe internal -clock frequencies.</p> - -<h2>Status</h2> - -<p>Has been simulated with Icarus Verilog.</p> -}}} - -[[RepositoryIndex(format=table,glob=user/js/toggle)]] - -|| Clone `https://git.cryptech.is/user/js/toggle.git` || |