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authorRob Austein <sra@hactrn.net>2020-09-13 23:06:24 +0000
committerRob Austein <sra@hactrn.net>2020-09-13 23:06:24 +0000
commit891730d13b324fad916572a82f0bd610c5de9aad (patch)
treef46c94ddfff34f15aafe7cac0596716d1c13c412 /raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim
parentb092ffbcbe2c9398494f7dc9db6f0796971633e0 (diff)
Rename for conversion
Diffstat (limited to 'raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim')
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diff --git a/raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim b/raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim
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index e5c6fc3..0000000
--- a/raw-wiki-dump/GitRepositories%2Fcore%2Fcomm%2Feim
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@@ -1,20 +0,0 @@
-{{{
-#!htmlcomment
-
-This page is maintained automatically by a script. Don't modify this page by hand,
-your changes will just be overwritten the next time the script runs. Talk to your
-Friendly Neighborhood Repository Maintainer if you need to change something here.
-
-}}}
-
-{{{
-#!html
-<h1>eim</h1>
-
-<p>Verilog implementation of the eim interface used to connect FPGA cores
-to the Freescale i.MX6 CPU.</p>
-}}}
-
-[[RepositoryIndex(format=table,glob=core/comm/eim)]]
-
-|| Clone `https://git.cryptech.is/core/comm/eim.git` ||