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Diffstat (limited to 'fmc.c')
| -rw-r--r-- | fmc.c | 438 |
1 files changed, 438 insertions, 0 deletions
@@ -0,0 +1,438 @@ +/**
+ ******************************************************************************
+ * File Name : FMC.c
+ * Description : This file provides code for the configuration
+ * of the FMC peripheral.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2016 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "fmc.h"
+
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+SDRAM_HandleTypeDef hsdram1;
+SDRAM_HandleTypeDef hsdram2;
+
+/* FMC initialization function */
+//-----------------------------------------------------------------------------
+void MX_FMC_Init(void)
+//-----------------------------------------------------------------------------
+{
+ // timing parameters
+ FMC_SDRAM_TimingTypeDef SdramTiming;
+
+ //
+ // following settings are for -75E speed grade memory chip
+ // clocked at only 90 MHz instead of the rated 133 MHz
+ //
+
+ SdramTiming.LoadToActiveDelay = 2; // tMRD
+
+ SdramTiming.ExitSelfRefreshDelay = 7; // 67 ns @ 90 MHz is 6.03 cycles, so in theory 6
+ // can be used here, but let's be on the safe side
+
+ SdramTiming.SelfRefreshTime = 5; // should be >= tRAS (5 cycles)
+
+ SdramTiming.RowCycleDelay = 8; // tRC
+
+ SdramTiming.WriteRecoveryTime = 4; // must be >= tRAS - tRCD (5 - 2 = 3 cycles),
+ // and >= tRC - tRCD - tRP (8 - 2 - 2 = 4 cycles)
+
+ SdramTiming.RPDelay = 2; // tRP
+
+ SdramTiming.RCDDelay = 2; // tRCD
+
+
+ //
+ // configure the first bank
+ //
+
+
+ // memory type
+ hsdram1.Instance = FMC_SDRAM_DEVICE;
+
+ // bank
+ hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
+
+ // settings for IS42S32160F
+ hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;
+ hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;
+ hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32;
+ hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+ hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
+
+ // write protection not needed
+ hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+
+ // memory clock is 90 MHz (HCLK / 2)
+ hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+
+ // read burst not needed
+ hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+
+ // additional pipeline stages not neeed
+ hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
+
+ // call HAL layer
+ HAL_SDRAM_Init(&hsdram1, &SdramTiming);
+
+
+ //
+ // configure the second bank
+ //
+
+
+ // memory type
+ hsdram2.Instance = FMC_SDRAM_DEVICE;
+
+ // bank number
+ hsdram2.Init.SDBank = FMC_SDRAM_BANK2;
+
+ // settings for IS42S32160F
+ hsdram2.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;
+ hsdram2.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;
+ hsdram2.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32;
+ hsdram2.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+ hsdram2.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
+
+ // write protection not needed
+ hsdram2.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+
+ // memory clock is 90 MHz (HCLK / 2)
+ hsdram2.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+
+ // read burst not needed
+ hsdram2.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+
+ // additional pipeline stages not neeed
+ hsdram2.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
+
+ // call HAL layer
+ HAL_SDRAM_Init(&hsdram2, &SdramTiming);
+
+}
+
+static int FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+ /* USER CODE BEGIN FMC_MspInit 0 */
+
+ /* USER CODE END FMC_MspInit 0 */
+ GPIO_InitTypeDef GPIO_InitStruct;
+ if (FMC_Initialized) {
+ return;
+ }
+ FMC_Initialized = 1;
+ /* Peripheral clock enable */
+ __HAL_RCC_FMC_CLK_ENABLE();
+
+ /** FMC GPIO Configuration
+ PI9 ------> FMC_D30
+ PI10 ------> FMC_D31
+ PF0 ------> FMC_A0
+ PF1 ------> FMC_A1
+ PF2 ------> FMC_A2
+ PF3 ------> FMC_A3
+ PF4 ------> FMC_A4
+ PF5 ------> FMC_A5
+ PC0 ------> FMC_SDNWE
+ PC2 ------> FMC_SDNE0
+ PC3 ------> FMC_SDCKE0
+ PF11 ------> FMC_SDNRAS
+ PF12 ------> FMC_A6
+ PF13 ------> FMC_A7
+ PF14 ------> FMC_A8
+ PF15 ------> FMC_A9
+ PG0 ------> FMC_A10
+ PG1 ------> FMC_A11
+ PE7 ------> FMC_D4
+ PE8 ------> FMC_D5
+ PE9 ------> FMC_D6
+ PE10 ------> FMC_D7
+ PE11 ------> FMC_D8
+ PE12 ------> FMC_D9
+ PE13 ------> FMC_D10
+ PE14 ------> FMC_D11
+ PE15 ------> FMC_D12
+ PH8 ------> FMC_D16
+ PH9 ------> FMC_D17
+ PH10 ------> FMC_D18
+ PH11 ------> FMC_D19
+ PH12 ------> FMC_D20
+ PD8 ------> FMC_D13
+ PD9 ------> FMC_D14
+ PD10 ------> FMC_D15
+ PD14 ------> FMC_D0
+ PD15 ------> FMC_D1
+ PG2 ------> FMC_A12
+ PG4 ------> FMC_BA0
+ PG5 ------> FMC_BA1
+ PG8 ------> FMC_SDCLK
+ PH13 ------> FMC_D21
+ PH14 ------> FMC_D22
+ PH15 ------> FMC_D23
+ PI0 ------> FMC_D24
+ PI1 ------> FMC_D25
+ PI2 ------> FMC_D26
+ PI3 ------> FMC_D27
+ PD0 ------> FMC_D2
+ PD1 ------> FMC_D3
+ PG15 ------> FMC_SDNCAS
+ PB5 ------> FMC_SDCKE1
+ PB6 ------> FMC_SDNE1
+ PE0 ------> FMC_NBL0
+ PE1 ------> FMC_NBL1
+ PI4 ------> FMC_NBL2
+ PI5 ------> FMC_NBL3
+ PI6 ------> FMC_D28
+ PI7 ------> FMC_D29
+ */
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
+ |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
+ |GPIO_PIN_6|GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
+ |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4
+ |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /* GPIO_InitStruct */
+ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN FMC_MspInit 1 */
+
+ /* USER CODE END FMC_MspInit 1 */
+}
+
+void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
+ /* USER CODE BEGIN SDRAM_MspInit 0 */
+
+ /* USER CODE END SDRAM_MspInit 0 */
+ HAL_FMC_MspInit();
+ /* USER CODE BEGIN SDRAM_MspInit 1 */
+
+ /* USER CODE END SDRAM_MspInit 1 */
+}
+
+static int FMC_DeInitialized = 0;
+
+static void HAL_FMC_MspDeInit(void){
+ /* USER CODE BEGIN FMC_MspDeInit 0 */
+
+ /* USER CODE END FMC_MspDeInit 0 */
+ if (FMC_DeInitialized) {
+ return;
+ }
+ FMC_DeInitialized = 1;
+ /* Peripheral clock enable */
+ __HAL_RCC_FMC_CLK_DISABLE();
+
+ /** FMC GPIO Configuration
+ PI9 ------> FMC_D30
+ PI10 ------> FMC_D31
+ PF0 ------> FMC_A0
+ PF1 ------> FMC_A1
+ PF2 ------> FMC_A2
+ PF3 ------> FMC_A3
+ PF4 ------> FMC_A4
+ PF5 ------> FMC_A5
+ PC0 ------> FMC_SDNWE
+ PC2 ------> FMC_SDNE0
+ PC3 ------> FMC_SDCKE0
+ PF11 ------> FMC_SDNRAS
+ PF12 ------> FMC_A6
+ PF13 ------> FMC_A7
+ PF14 ------> FMC_A8
+ PF15 ------> FMC_A9
+ PG0 ------> FMC_A10
+ PG1 ------> FMC_A11
+ PE7 ------> FMC_D4
+ PE8 ------> FMC_D5
+ PE9 ------> FMC_D6
+ PE10 ------> FMC_D7
+ PE11 ------> FMC_D8
+ PE12 ------> FMC_D9
+ PE13 ------> FMC_D10
+ PE14 ------> FMC_D11
+ PE15 ------> FMC_D12
+ PH8 ------> FMC_D16
+ PH9 ------> FMC_D17
+ PH10 ------> FMC_D18
+ PH11 ------> FMC_D19
+ PH12 ------> FMC_D20
+ PD8 ------> FMC_D13
+ PD9 ------> FMC_D14
+ PD10 ------> FMC_D15
+ PD14 ------> FMC_D0
+ PD15 ------> FMC_D1
+ PG2 ------> FMC_A12
+ PG4 ------> FMC_BA0
+ PG5 ------> FMC_BA1
+ PG8 ------> FMC_SDCLK
+ PH13 ------> FMC_D21
+ PH14 ------> FMC_D22
+ PH15 ------> FMC_D23
+ PI0 ------> FMC_D24
+ PI1 ------> FMC_D25
+ PI2 ------> FMC_D26
+ PI3 ------> FMC_D27
+ PD0 ------> FMC_D2
+ PD1 ------> FMC_D3
+ PG15 ------> FMC_SDNCAS
+ PB5 ------> FMC_SDCKE1
+ PB6 ------> FMC_SDNE1
+ PE0 ------> FMC_NBL0
+ PE1 ------> FMC_NBL1
+ PI4 ------> FMC_NBL2
+ PI5 ------> FMC_NBL3
+ PI6 ------> FMC_D28
+ PI7 ------> FMC_D29
+ */
+
+ HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
+ |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
+ |GPIO_PIN_6|GPIO_PIN_7);
+
+ HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
+ |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
+
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3);
+
+ HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4
+ |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15);
+
+ HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
+
+ HAL_GPIO_DeInit(GPIOH, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
+
+ HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
+
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5|GPIO_PIN_6);
+
+ /* USER CODE BEGIN FMC_MspDeInit 1 */
+
+ /* USER CODE END FMC_MspDeInit 1 */
+}
+
+void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
+ /* USER CODE BEGIN SDRAM_MspDeInit 0 */
+
+ /* USER CODE END SDRAM_MspDeInit 0 */
+ HAL_FMC_MspDeInit();
+ /* USER CODE BEGIN SDRAM_MspDeInit 1 */
+
+ /* USER CODE END SDRAM_MspDeInit 1 */
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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