diff options
Diffstat (limited to 'src/tb/tb_clkmgr_new.v')
| -rw-r--r-- | src/tb/tb_clkmgr_new.v | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/src/tb/tb_clkmgr_new.v b/src/tb/tb_clkmgr_new.v new file mode 100644 index 0000000..75d281d --- /dev/null +++ b/src/tb/tb_clkmgr_new.v @@ -0,0 +1,77 @@ +`timescale 1ns / 1ps
+
+module tb_clkmgr_new;
+
+
+ //
+ // Inputs
+ //
+ reg gclk = 1'b0;
+ reg gclk_stop;
+ wire gclk_p = (gclk & ~gclk_stop);
+ wire gclk_n = ~(gclk & ~gclk_stop);
+ reg reset_mcu_b;
+
+
+
+ //
+ // Outputs
+ //
+ wire sys_clk;
+ wire sys_rst;
+
+
+ //
+ // UUT
+ //
+ novena_clkmgr_new #
+ (
+ .CLK_OUT_MUL (4), // 200 MHz
+ .CLK_OUT_DIV (1) //
+ )
+ uut
+ (
+ .gclk_p (gclk_p),
+ .gclk_n (gclk_n),
+
+ .reset_mcu_b (reset_mcu_b),
+
+ .sys_clk (sys_clk),
+ .sys_rst (sys_rst)
+ );
+
+
+ //
+ // Clock (50 MHz)
+ //
+ always #10 gclk = ~gclk;
+
+
+ //
+ // Script
+ //
+ initial begin
+ //
+ reset_mcu_b = 0; // reset active
+ gclk_stop = 0; // gclk running
+ //
+ #500;
+ //
+ reset_mcu_b = 1; // clear reset
+ //
+ #1000;
+ //
+ gclk_stop = 1; // try to stop gclk
+ #1000;
+ gclk_stop = 0; // enable gclk again
+ //
+ #1000;
+ //
+ reset_mcu_b = 0; // try to activate reset
+ #1000;
+ reset_mcu_b = 1; // clear reset again
+ //
+ end
+
+endmodule
+
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