| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-10-01 | Moved to "modexpng_fpga_model" repo, this one was meant for Verilog. | Pavel V. Shatov (Meister) |
| 2019-04-04 | Fixed 4096-bit test vector generation. | Pavel V. Shatov (Meister) |
| 2019-03-23 | Added blinding support to test vector generation scripts. | Pavel V. Shatov (Meister) |
| 2019-03-23 | Randomized test vector generation scripts for ModExpNG. | Pavel V. Shatov (Meister) |
 |
index : user/shatov/modexpng | |
| "Next-generation" modular exponentiation using the specialized DSP slices present in the Artix-7 FPGA | git repositories |
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