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"Next-generation" modular exponentiation using the specialized DSP slices present in the Artix-7 FPGA
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modexpng_uop_rom.v
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2019-10-21
Added support for non-CRT mode. Further refactoring.
Pavel V. Shatov (Meister)
2019-10-21
Redesigned the testbench. Core clock does not necessarily need to be twice
Pavel V. Shatov (Meister)
2019-10-21
Entire CRT signature algorithm works by now.
Pavel V. Shatov (Meister)
2019-10-21
Added the regular (not modular) addition operation required during the final
Pavel V. Shatov (Meister)
2019-10-21
Added "MERGE_LH" micro-operation. To be able to do Garner's formula we need
Pavel V. Shatov (Meister)
2019-10-21
Refactored general worker module
Pavel V. Shatov (Meister)
2019-10-03
Added more micro-operations, entire Montgomery exponentiation ladder works now.
Pavel V. Shatov (Meister)
2019-10-03
Added more micro-operations, also added "general worker" module. The worker i...
Pavel V. Shatov (Meister)
2019-10-03
Expanded micro-operation parameters (added dedicated control bit to force the...
Pavel V. Shatov (Meister)
2019-10-03
Reworked storage architecture (moved I/O memory to a separate module, since t...
Pavel V. Shatov (Meister)