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-rw-r--r--rtl/modexpng_sdp_36k_x16_x32_wrapper_xilinx.v75
1 files changed, 75 insertions, 0 deletions
diff --git a/rtl/modexpng_sdp_36k_x16_x32_wrapper_xilinx.v b/rtl/modexpng_sdp_36k_x16_x32_wrapper_xilinx.v
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+++ b/rtl/modexpng_sdp_36k_x16_x32_wrapper_xilinx.v
@@ -0,0 +1,75 @@
+module modexpng_sdp_36k_x16_x32_wrapper_xilinx
+(
+ clk, clk_bus,
+
+ ena, wea,
+ addra, dina,
+
+ enb, regceb,
+ addrb, doutb
+);
+
+
+ //
+ // Headers
+ //
+ `include "modexpng_parameters.vh"
+
+
+ //
+ // Ports
+ //
+ input clk;
+ input clk_bus;
+
+ input ena;
+ input wea;
+ input [BANK_ADDR_W + BUS_OP_ADDR_W -1:0] addra;
+ input [ BUS_DATA_W -1:0] dina;
+
+ input enb;
+ input regceb;
+ input [BANK_ADDR_W + OP_ADDR_W -1:0] addrb;
+ output [ WORD_W -1:0] doutb;
+
+
+ //
+ // BRAM_SDP_MACRO
+ //
+ BRAM_SDP_MACRO #
+ (
+ .DEVICE ("7SERIES"),
+
+ .BRAM_SIZE ("36Kb"),
+
+ .WRITE_WIDTH (BUS_DATA_W),
+ .READ_WIDTH (WORD_W),
+
+ .DO_REG (1),
+ .WRITE_MODE ("READ_FIRST"),
+
+ .SRVAL (72'h000000000000000000),
+ .INIT (72'h000000000000000000),
+
+ .INIT_FILE ("NONE"),
+ .SIM_COLLISION_CHECK ("NONE")
+ )
+ BRAM_SDP_MACRO_inst
+ (
+ .RST (1'b0),
+
+ .WRCLK (clk_bus),
+ .WREN (ena),
+ .WE ({4{wea}}),
+ .WRADDR (addra),
+ .DI (dina),
+
+ .RDCLK (clk),
+ .RDEN (enb),
+ .REGCE (regceb),
+ .RDADDR (addrb),
+ .DO (doutb)
+ );
+
+
+endmodule