diff options
Diffstat (limited to 'rtl/modexpng_mmm_dual.v')
| -rw-r--r-- | rtl/modexpng_mmm_dual.v | 43 |
1 files changed, 22 insertions, 21 deletions
diff --git a/rtl/modexpng_mmm_dual.v b/rtl/modexpng_mmm_dual.v index b9b41e8..14f1b47 100644 --- a/rtl/modexpng_mmm_dual.v +++ b/rtl/modexpng_mmm_dual.v @@ -17,16 +17,16 @@ module modexpng_mmm_dual rd_wide_xy_bank_aux, rd_wide_xy_addr, rd_wide_xy_addr_aux, - rd_wide_x_dout, - rd_wide_y_dout, - rd_wide_x_dout_aux, - rd_wide_y_dout_aux, + rd_wide_x_din, + rd_wide_y_din, + rd_wide_x_din_aux, + rd_wide_y_din_aux, rd_narrow_xy_ena, rd_narrow_xy_bank, rd_narrow_xy_addr, - rd_narrow_x_dout, - rd_narrow_y_dout, + rd_narrow_x_din, + rd_narrow_y_din, rcmb_wide_xy_bank, rcmb_wide_xy_addr, @@ -82,16 +82,16 @@ module modexpng_mmm_dual output [ BANK_ADDR_W -1:0] rd_wide_xy_bank_aux; output [ 8*NUM_MULTS/2-1:0] rd_wide_xy_addr; output [ 8-1:0] rd_wide_xy_addr_aux; - input [18*NUM_MULTS/2-1:0] rd_wide_x_dout; - input [18*NUM_MULTS/2-1:0] rd_wide_y_dout; - input [ 18-1:0] rd_wide_x_dout_aux; - input [ 18-1:0] rd_wide_y_dout_aux; + input [18*NUM_MULTS/2-1:0] rd_wide_x_din; + input [18*NUM_MULTS/2-1:0] rd_wide_y_din; + input [ 18-1:0] rd_wide_x_din_aux; + input [ 18-1:0] rd_wide_y_din_aux; output rd_narrow_xy_ena; output [ BANK_ADDR_W -1:0] rd_narrow_xy_bank; output [ 7:0] rd_narrow_xy_addr; - input [18-1:0] rd_narrow_x_dout; - input [18-1:0] rd_narrow_y_dout; + input [18-1:0] rd_narrow_x_din; + input [18-1:0] rd_narrow_y_din; output [BANK_ADDR_W -1:0] rcmb_wide_xy_bank; output [ 7:0] rcmb_wide_xy_addr; @@ -626,8 +626,8 @@ module modexpng_mmm_dual //end //endgenerate - assign dsp_x_a = {rd_wide_x_dout_aux, rd_wide_x_dout}; - assign dsp_y_a = {rd_wide_y_dout_aux, rd_wide_y_dout}; + assign dsp_x_a = {rd_wide_x_din_aux, rd_wide_x_din}; + assign dsp_y_a = {rd_wide_y_din_aux, rd_wide_y_din}; //assign dsp_x_a[18*4+:18] = rd_wide_x_dout_aux; //assign dsp_y_a[18*4+:18] = rd_wide_y_dout_aux; @@ -730,25 +730,25 @@ module modexpng_mmm_dual // // On-the-fly Carry Recombination // - wire [17:0] rd_narrow_x_dout_carry = rd_narrow_x_dout + {{16{1'b0}}, dsp_xy_b_carry}; - wire [17:0] rd_narrow_y_dout_carry = rd_narrow_y_dout + {{16{1'b0}}, dsp_xy_b_carry}; - wire [17:0] rd_narrow_xy_dout_carry_mux = ladder_mode ? rd_narrow_y_dout_carry : rd_narrow_x_dout_carry; + wire [17:0] rd_narrow_x_din_carry = rd_narrow_x_din + {{16{1'b0}}, dsp_xy_b_carry}; + wire [17:0] rd_narrow_y_din_carry = rd_narrow_y_din + {{16{1'b0}}, dsp_xy_b_carry}; + wire [17:0] rd_narrow_xy_din_carry_mux = ladder_mode ? rd_narrow_y_din_carry : rd_narrow_x_din_carry; wire [15:0] rd_narrow_xy_dout_carry_mux_or_unity = !force_unity_b ? - rd_narrow_xy_dout_carry_mux[15:0] : dsp_merge_xy_b_first ? WORD_ONE : WORD_ZERO; + rd_narrow_xy_din_carry_mux[15:0] : dsp_merge_xy_b_first ? WORD_ONE : WORD_ZERO; always @(posedge clk) // if (narrow_xy_ena_dly2) begin // rewrite // if (!dsp_merge_xy_b) begin - dsp_x_b <= rd_narrow_x_dout[15:0]; - dsp_y_b <= rd_narrow_y_dout[15:0]; + dsp_x_b <= rd_narrow_x_din[15:0]; + dsp_y_b <= rd_narrow_y_din[15:0]; dsp_xy_b_carry <= 2'b00; end else begin dsp_x_b <= rd_narrow_xy_dout_carry_mux_or_unity; dsp_y_b <= rd_narrow_xy_dout_carry_mux_or_unity; - dsp_xy_b_carry <= rd_narrow_xy_dout_carry_mux[17:16]; + dsp_xy_b_carry <= rd_narrow_xy_din_carry_mux[17:16]; end // end else begin @@ -845,6 +845,7 @@ module modexpng_mmm_dual modexpng_recombinator_block recombinator_block ( .clk (clk), + .rst (rst), .ena (rcmb_ena), .rdy (rcmb_rdy), |