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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-01-16 21:38:04 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-01-16 21:38:04 +0300
commite5f4454e3ac52fa761f301e7d11ad144cd23d590 (patch)
treeaccbdc37b3abfdc4b0ac5cdc85fdae8a70289ccb /stm32/modexpng_driver_sample.c
parent6a0438e33fa300822216c259668180f177ac0343 (diff)
Reworked modular subtraction micro-operation. Previously it used "two-pass"
bank address space sweep, during the first pass (a-b) and (a-b+n) were computed, during the second pass either the former or the latter quantity was written to the output bank (depending on the very last borrow flag value). This is no longer possible, since the FSM now only generates one "interleaved" address space sweep. The solution is to split one complex modular subtraction operation into simpler sub-operations. Currently modular subtraction is achieved by running a sequence of three micro-operations: * MODULAR_SUBTRACT_X computes (a-b) and latches the final borrow flag * MODULAR_SUBTRACT_Y computes (a-b+n) * MODULAR_SUBTRACT_Z writes either (a-b) or (a-b+n) into the output bank depending on the latched value of the borrow flag Unfortunately we can't compute both (a-b) and (a-b+n) during one address space sweep, since fully pipelined adder/subtractor DSP slice has 2-cycle latency.
Diffstat (limited to 'stm32/modexpng_driver_sample.c')
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