Reworked modular subtraction micro-operation. Previously it used "two-pass"

bank address space sweep, during the first pass (a-b) and (a-b+n) were
computed, during the second pass either the former or the latter quantity was
written to the output bank (depending on the very last borrow flag value).
This is no longer possible, since the FSM now only generates one "interleaved"
address space sweep. The solution is to split one complex modular subtraction
operation into simpler sub-operations. Currently modular subtraction is
achieved by running a sequence of three micro-operations:
 * MODULAR_SUBTRACT_X computes (a-b) and latches the final borrow flag
 * MODULAR_SUBTRACT_Y computes (a-b+n)
 * MODULAR_SUBTRACT_Z writes either (a-b) or (a-b+n) into the output bank
                      depending on the latched value of the borrow flag
Unfortunately we can't compute both (a-b) and (a-b+n) during one address space
sweep, since fully pipelined adder/subtractor DSP slice has 2-cycle latency.

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