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| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2019-10-03 16:40:25 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2019-10-03 16:40:25 +0300 |
| commit | affada8d5da7426d22035360c3674ab3b3311ab5 (patch) | |
| tree | a3db075dc03033db45e3ad5279badf2da48b4566 /rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v | |
| parent | 0b4b42da734c1164b65a334351274f946b2d4dcb (diff) | |
Reworked storage architecture (moved I/O memory to a separate module, since there's
only one instance of input/output values, while storage manager has dual storage space
for P and Q multipliers).
Started working on microcoded layer, added input operation and modular multiplication.
Diffstat (limited to 'rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v')
| -rw-r--r-- | rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v b/rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v new file mode 100644 index 0000000..b9e40ae --- /dev/null +++ b/rtl/modexpng_sdp_36k_x18_wrapper_xilinx.v @@ -0,0 +1,72 @@ +module modexpng_sdp_36k_x18_wrapper +( + clk, + + ena, wea, + addra, dina, + + enb, regceb, + addrb, doutb +); + + + // + // Headers + // + `include "modexpng_parameters.vh" + + + // + // Ports + // + input clk; + + input ena; + input wea; + input [BANK_ADDR_W + OP_ADDR_W -1:0] addra; + input [ WORD_EXT_W -1:0] dina; + + input enb; + input regceb; + input [BANK_ADDR_W + OP_ADDR_W -1:0] addrb; + output [ WORD_EXT_W -1:0] doutb; + + // + // BRAM_SDP_MACRO + // + BRAM_SDP_MACRO # + ( + .DEVICE ("7SERIES"), + + .BRAM_SIZE ("36Kb"), + + .WRITE_WIDTH (WORD_EXT_W), + .READ_WIDTH (WORD_EXT_W), + + .DO_REG (1), + .WRITE_MODE ("READ_FIRST"), + + .SRVAL (72'h000000000000000000), + .INIT (72'h000000000000000000), + + .INIT_FILE ("NONE"), + .SIM_COLLISION_CHECK ("NONE") + ) + BRAM_SDP_MACRO_inst + ( + .RST (1'b0), + + .WRCLK (clk), + .WREN (ena), + .WE ({2{wea}}), + .WRADDR (addra), + .DI (dina), + + .RDCLK (clk), + .RDEN (enb), + .REGCE (regceb), + .RDADDR (addrb), + .DO (doutb) + ); + +endmodule |