diff options
author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2019-10-21 15:13:01 +0300 |
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committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2019-10-21 15:13:01 +0300 |
commit | 584393ac5fc9bbe80887702ec2fc97bee999c5e7 (patch) | |
tree | ffda0852ba561ca13ee07ef6147225a38d809151 /rtl/modexpng_io_block.v | |
parent | 69b5d9f65cf49adbc1c1850fa2c4757199008717 (diff) |
Further work:
- added core wrapper
- fixed module resets across entire core (all the resets are now consistently
active-low)
- continued refactoring
Diffstat (limited to 'rtl/modexpng_io_block.v')
-rw-r--r-- | rtl/modexpng_io_block.v | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/rtl/modexpng_io_block.v b/rtl/modexpng_io_block.v index 6d008aa..622c25e 100644 --- a/rtl/modexpng_io_block.v +++ b/rtl/modexpng_io_block.v @@ -1,6 +1,6 @@ module modexpng_io_block ( - clk, clk_bus, rst, + clk, rst_n, clk_bus, bus_cs, bus_we, @@ -33,8 +33,9 @@ module modexpng_io_block // Ports // input clk; + input rst_n; + input clk_bus; - input rst; input bus_cs; input bus_we; @@ -62,9 +63,9 @@ module modexpng_io_block reg in_1_reg_en = 1'b0; reg in_2_reg_en = 1'b0; - always @(posedge clk) + always @(posedge clk or negedge rst_n) // - if (rst) begin + if (!rst_n) begin in_1_reg_en <= 1'b0; in_2_reg_en <= 1'b0; end else begin |