diff options
-rw-r--r-- | rtl/curve/uop/uop_add_rom.v | 2 | ||||
-rw-r--r-- | rtl/curve/uop/uop_conv_rom.v | 2 | ||||
-rw-r--r-- | rtl/curve/uop/uop_dbl_rom.v | 2 | ||||
-rw-r--r-- | rtl/curve/uop/uop_init_rom.v | 2 | ||||
-rw-r--r-- | rtl/ecdsa256_wrapper.v | 8 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_copy.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_init.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v | 2 | ||||
-rw-r--r-- | rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v | 2 |
12 files changed, 15 insertions, 15 deletions
diff --git a/rtl/curve/uop/uop_add_rom.v b/rtl/curve/uop/uop_add_rom.v index c807736..2c3d953 100644 --- a/rtl/curve/uop/uop_add_rom.v +++ b/rtl/curve/uop/uop_add_rom.v @@ -11,7 +11,7 @@ module uop_add_rom // // Microcode // -`include "..\uop_ecdsa.v" +`include "../uop_ecdsa.v" // diff --git a/rtl/curve/uop/uop_conv_rom.v b/rtl/curve/uop/uop_conv_rom.v index 3097736..47c8078 100644 --- a/rtl/curve/uop/uop_conv_rom.v +++ b/rtl/curve/uop/uop_conv_rom.v @@ -11,7 +11,7 @@ module uop_conv_rom //
// Microcode
//
-`include "..\uop_ecdsa.v"
+`include "../uop_ecdsa.v"
// diff --git a/rtl/curve/uop/uop_dbl_rom.v b/rtl/curve/uop/uop_dbl_rom.v index 1939ca9..728294d 100644 --- a/rtl/curve/uop/uop_dbl_rom.v +++ b/rtl/curve/uop/uop_dbl_rom.v @@ -11,7 +11,7 @@ module uop_dbl_rom //
// Microcode
//
-`include "..\uop_ecdsa.v"
+`include "../uop_ecdsa.v"
// diff --git a/rtl/curve/uop/uop_init_rom.v b/rtl/curve/uop/uop_init_rom.v index ac44b55..4847a08 100644 --- a/rtl/curve/uop/uop_init_rom.v +++ b/rtl/curve/uop/uop_init_rom.v @@ -11,7 +11,7 @@ module uop_init_rom //
// Microcode
//
-`include "..\uop_ecdsa.v"
+`include "../uop_ecdsa.v"
// diff --git a/rtl/ecdsa256_wrapper.v b/rtl/ecdsa256_wrapper.v index c6e93ea..ff324b6 100644 --- a/rtl/ecdsa256_wrapper.v +++ b/rtl/ecdsa256_wrapper.v @@ -33,12 +33,12 @@ module ecdsa256_wrapper ( input wire clk, - input wire rst_n, + input wire reset_n, input wire cs, input wire we, - input wire [5: 0] address, + input wire [7: 0] address, input wire [31: 0] write_data, output wire [31: 0] read_data ); @@ -102,7 +102,7 @@ module ecdsa256_wrapper ecdsa256 ecdsa256_inst ( .clk (clk),
- .rst_n (rst_n), + .rst_n (reset_n), .next (reg_control), .valid (reg_status), @@ -126,7 +126,7 @@ module ecdsa256_wrapper // always @(posedge clk) // - if (!rst_n) begin + if (!reset_n) begin // reg_control <= 1'b0; // diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_copy.v b/rtl/modular/modular_invertor/helper/modinv_helper_copy.v index 07c1b4f..9fc0ec4 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_copy.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_copy.v @@ -22,7 +22,7 @@ module modinv_helper_copy //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_init.v b/rtl/modular/modular_invertor/helper/modinv_helper_init.v index 0468134..5011907 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_init.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_init.v @@ -26,7 +26,7 @@ module modinv_helper_init //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v b/rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v index 6b65eb1..06eccfb 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_invert_compare.v @@ -23,7 +23,7 @@ module modinv_helper_invert_compare //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v b/rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v index ab15563..c3dccd5 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_invert_precalc.v @@ -32,7 +32,7 @@ module modinv_helper_invert_precalc //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v b/rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v index 0cd6ac5..0fbce6c 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_invert_update.v @@ -33,7 +33,7 @@ module modinv_helper_invert_update //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v b/rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v index fb858a6..be7436e 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_reduce_precalc.v @@ -30,7 +30,7 @@ module modinv_helper_reduce_precalc //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
diff --git a/rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v b/rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v index ea5b854..ca564e5 100644 --- a/rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v +++ b/rtl/modular/modular_invertor/helper/modinv_helper_reduce_update.v @@ -23,7 +23,7 @@ module modinv_helper_reduce_update //
// clog2
//
-`include "..\modinv_clog2.v"
+`include "../modinv_clog2.v"
//
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