Fixed coordinates of the hardcoded double of the base point, added more testfix

vectors to make sure, that the patch actually works. See the corresponding
commit message for the ecdsa_fpga_model for more details.

2 files changed, 18 insertions, 18 deletions

diff --git a/rtl/curve/rom/brom_p256_h_x.v b/rtl/curve/rom/brom_p256_h_x.v
index 0b69f77..1982690 100644
--- a/rtl/curve/rom/brom_p256_h_x.v
+++ b/rtl/curve/rom/brom_p256_h_x.v
@@ -54,14 +54,14 @@ module brom_p256_h_x
 	always @(posedge clk)
 		//

 		case (b_addr)

-			3'b000:	bram_reg_b <= 32'h4ece7ad0;

-			3'b001:	bram_reg_b <= 32'h16bd8d74;

-			3'b010:	bram_reg_b <= 32'ha42998be;

-			3'b011:	bram_reg_b <= 32'h11f904fe;

-			3'b100:	bram_reg_b <= 32'h38b77e1b;

-			3'b101:	bram_reg_b <= 32'h0e863235;

-			3'b110:	bram_reg_b <= 32'h3da77b71;

-			3'b111:	bram_reg_b <= 32'h29d05c19;

+			3'b000:	bram_reg_b <= 32'h47669978;

+			3'b001:	bram_reg_b <= 32'ha60b48fc;

+			3'b010:	bram_reg_b <= 32'h77f21b35;

+			3'b011:	bram_reg_b <= 32'hc08969e2;

+			3'b100:	bram_reg_b <= 32'h04b51ac3;

+			3'b101:	bram_reg_b <= 32'h8a523803;

+			3'b110:	bram_reg_b <= 32'h8d034f7e;

+			3'b111:	bram_reg_b <= 32'h7cf27b18;

 		endcase
 
 
diff --git a/rtl/curve/rom/brom_p256_h_y.v b/rtl/curve/rom/brom_p256_h_y.v
index 362fce6..f718d46 100644
--- a/rtl/curve/rom/brom_p256_h_y.v
+++ b/rtl/curve/rom/brom_p256_h_y.v
@@ -54,15 +54,15 @@ module brom_p256_h_y
 	always @(posedge clk)
 		//

 		case (b_addr)

-			3'b000:	bram_reg_b <= 32'hc840ae07;

-			3'b001:	bram_reg_b <= 32'h3449bf97;

-			3'b010:	bram_reg_b <= 32'h94cea131;

-			3'b011:	bram_reg_b <= 32'hd431cca9;

-			3'b100:	bram_reg_b <= 32'h83f061e9;

-			3'b101:	bram_reg_b <= 32'h711814b5;

-			3'b110:	bram_reg_b <= 32'h01e58065;

-			3'b111:	bram_reg_b <= 32'hb01cbd1c;

-		endcase
-
+			3'b000:	bram_reg_b <= 32'h227873d1;

+			3'b001:	bram_reg_b <= 32'h9e04b79d;

+			3'b010:	bram_reg_b <= 32'h3ce98229;

+			3'b011:	bram_reg_b <= 32'hba7dade6;

+			3'b100:	bram_reg_b <= 32'h9f7430db;

+			3'b101:	bram_reg_b <= 32'h293d9ac6;

+			3'b110:	bram_reg_b <= 32'hdb8ed040;

+			3'b111:	bram_reg_b <= 32'h07775510;

+		endcase

+		
 
 endmodule