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-rw-r--r--KiCAD/rev02_21.sch-bak52
1 files changed, 31 insertions, 21 deletions
diff --git a/KiCAD/rev02_21.sch-bak b/KiCAD/rev02_21.sch-bak
index 8bb433b..1a7aaa5 100644
--- a/KiCAD/rev02_21.sch-bak
+++ b/KiCAD/rev02_21.sch-bak
@@ -1,5 +1,5 @@
EESchema Schematic File Version 4
-EELAYER 26 0
+EELAYER 30 0
EELAYER END
$Descr B 17000 11000
encoding utf-8
@@ -19,13 +19,13 @@ Text Notes 5000 4600 0 60 ~ 12
*) Power - CORE & BRAM
Text Notes 2000 4500 0 60 ~ 12
*) Ground Pins
-Text Notes 8460 10210 0 66 ~ 12
+Text Notes 8460 10210 0 66 ~ 13
FPGA power and ground
$Comp
-L power:GND GND_132
+L power:GND #GND_0132
U 1 1 58023EE6
P 2000 9700
-F 0 "GND_132" H 2000 9700 20 0000 C CNN
+F 0 "#GND_0132" H 2000 9700 20 0000 C CNN
F 1 "+GND" H 2000 9630 30 0000 C CNN
F 2 "" H 2000 9700 70 0000 C CNN
F 3 "" H 2000 9700 70 0000 C CNN
@@ -33,10 +33,10 @@ F 3 "" H 2000 9700 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L power:GND GND_133
+L power:GND #GND_0133
U 1 1 58023EE5
P 3800 9600
-F 0 "GND_133" H 3800 9600 20 0000 C CNN
+F 0 "#GND_0133" H 3800 9600 20 0000 C CNN
F 1 "+GND" H 3800 9530 30 0000 C CNN
F 2 "" H 3800 9600 70 0000 C CNN
F 3 "" H 3800 9600 70 0000 C CNN
@@ -44,10 +44,10 @@ F 3 "" H 3800 9600 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:FPGA_VCCINT_1V0 FPGA_VCCINT_1V0
+L Cryptech_Alpha:FPGA_VCCINT_1V0 #FPGA_VCCINT_1V00
U 1 1 58023EE4
P 6000 4900
-F 0 "FPGA_VCCINT_1V0" H 6000 4900 20 0000 C CNN
+F 0 "#FPGA_VCCINT_1V00" H 6000 4900 20 0000 C CNN
F 1 "+FPGA_VCCINT_1V0" H 6000 4830 30 0000 C CNN
F 2 "" H 6000 4900 70 0000 C CNN
F 3 "" H 6000 4900 70 0000 C CNN
@@ -55,10 +55,10 @@ F 3 "" H 6000 4900 70 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L Cryptech_Alpha:FPGA_VCCAUX_1V8 FPGA_VCCAUX_1V8_2
+L Cryptech_Alpha:FPGA_VCCAUX_1V8 #FPGA_VCCAUX_1V8_02
U 1 1 58023EE3
P 9000 4900
-F 0 "FPGA_VCCAUX_1V8_2" H 9000 4900 20 0000 C CNN
+F 0 "#FPGA_VCCAUX_1V8_02" H 9000 4900 20 0000 C CNN
F 1 "+FPGA_VCCAUX_1V8" H 9000 4830 30 0000 C CNN
F 2 "" H 9000 4900 70 0000 C CNN
F 3 "" H 9000 4900 70 0000 C CNN
@@ -506,44 +506,54 @@ L Cryptech_Alpha:XC7A200TFBG484_9 U13_13
U 1 1 58023EE2
P 1600 7300
F 0 "U13_13" H 1190 4890 60 0000 L BNN
- 1 1600 7300
- 1 0 0 -1
+F 1 "~" H 1600 7300 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 1190 4890 60 0001 C CNN
+F 3 "" H 1600 7300 50 0001 C CNN
+ 1 1600 7300
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_10 U13_14
U 1 1 58023EE1
P 3400 7300
F 0 "U13_14" H 2990 4990 60 0000 L BNN
- 1 3400 7300
- 1 0 0 -1
+F 1 "~" H 3400 7300 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 2990 4990 60 0001 C CNN
+F 3 "" H 3400 7300 50 0001 C CNN
+ 1 3400 7300
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_14 U13_15
U 1 1 58023EE0
P 8600 5300
F 0 "U13_15" H 8190 4890 60 0000 L BNN
- 1 8600 5300
- 1 0 0 -1
+F 1 "~" H 8600 5300 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 8190 4890 60 0001 C CNN
+F 3 "" H 8600 5300 50 0001 C CNN
+ 1 8600 5300
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_15 U13_16
U 1 1 58023EDF
P 5600 5200
F 0 "U13_16" H 5190 4890 60 0000 L BNN
- 1 5600 5200
- 1 0 0 -1
+F 1 "~" H 5600 5200 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 5190 4890 60 0001 C CNN
+F 3 "" H 5600 5200 50 0001 C CNN
+ 1 5600 5200
+ 1 0 0 -1
$EndComp
$Comp
L Cryptech_Alpha:XC7A200TFBG484_16 U13_17
U 1 1 58023EDE
P 5600 6600
F 0 "U13_17" H 5190 7410 60 0000 L TNN
- 1 5600 6600
- 1 0 0 1
+F 1 "~" H 5600 6600 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 5190 7410 60 0001 C CNN
+F 3 "" H 5600 6600 50 0001 C CNN
+ 1 5600 6600
+ 1 0 0 1
$EndComp
-$EndSCHEMATC \ No newline at end of file
+$EndSCHEMATC