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-rw-r--r--KiCAD/rev02_18.sch16
1 files changed, 8 insertions, 8 deletions
diff --git a/KiCAD/rev02_18.sch b/KiCAD/rev02_18.sch
index ae4a82e..0531e8f 100644
--- a/KiCAD/rev02_18.sch
+++ b/KiCAD/rev02_18.sch
@@ -304,11 +304,11 @@ Wire Wire Line
Wire Wire Line
5500 9000 5500 9200
Wire Wire Line
- 7000 4800 6000 4800
+ 7000 4800 6050 4800
Text Label 7000 4800 2 48 ~ 0
FPGA_VCCAUX_1V8
Wire Wire Line
- 7000 8000 6000 8000
+ 7000 8000 6050 8000
Text Label 7000 8000 0 48 ~ 0
VCCO_3V3
Wire Wire Line
@@ -451,8 +451,6 @@ Wire Wire Line
2300 8400 1900 8400
Wire Wire Line
1900 7500 1900 8400
-Wire Wire Line
- 1900 7500 1800 7500
Text GLabel 1400 7500 0 48 Input ~ 0
PWR_ENA_VCCO
Wire Wire Line
@@ -523,8 +521,6 @@ Wire Wire Line
4010 8400 3900 8400
Wire Wire Line
4010 8300 4010 8400
-Wire Wire Line
- 1400 7500 1800 7500
Connection ~ 2100 7900
Connection ~ 2300 4800
Connection ~ 2300 4700
@@ -780,8 +776,6 @@ F 3 "" H 1570 9470 60 0000 C CNN
1 1600 9600
0 -1 -1 0
$EndComp
-NoConn ~ 3900 5800
-NoConn ~ 3900 9000
Wire Wire Line
7000 4800 7000 4500
$Comp
@@ -832,4 +826,10 @@ F 3 "~" H 6050 8000 50 0001 C CNN
1 0 0 -1
$EndComp
Connection ~ 6050 8000
+Wire Wire Line
+ 6050 4800 6000 4800
+Wire Wire Line
+ 6050 8000 6000 8000
+Wire Wire Line
+ 1400 7500 1900 7500
$EndSCHEMATC