Renamed schematics sheets for consistency.

1 files changed, 619 insertions, 0 deletions

diff --git a/KiCAD/rev04_13.sch-bak b/KiCAD/rev04_13.sch-bak
new file mode 100644
index 0000000..54e2609
--- /dev/null
+++ b/KiCAD/rev04_13.sch-bak
@@ -0,0 +1,619 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr B 17000 11000
+encoding utf-8
+Sheet 14 27
+Title "rev04_13"
+Date "15 10 2016"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Notes 2300 3500 0    60   ~ 12
+*) Configuration Interface
+Text Notes 2200 7900 0    60   ~ 12
+M[2:0] == 3'b001 => Master SPI
+Text Notes 1900 6600 0    60   ~ 12
+*) Since VCCO is 3.3V, CFGBVS must be tied High.\n*) Battery is not used\n*) PROG_B is dedicated input -- can be driven by STM32 directly\n*) INIT_B is bi-directional open-drain, must be driven with MOSFET to ground
+Text Notes 4900 9000 0    60   ~ 12
+*) "Not DONE" LED, should be of red color
+Text Notes 4990 1960 0    54   ~ 11
+FPGA configuration interface
+Text Notes 2800 8580 0    60   ~ 12
+R35
+Text Notes 3600 8570 0    60   ~ 12
+R36
+Text Notes 7850 4700 0    60   ~ 12
+2N7002
+Text Notes 7650 4710 0    60   ~ 12
+Q4
+Text Notes 6340 8760 2    60   ~ 12
+R39
+Text Notes 9060 7990 0    60   ~ 12
+C108
+Text Notes 8960 8190 0    60   ~ 12
+0.1~uF
+Text Notes 2800 3770 0    60   ~ 12
+U13
+Text Notes 2250 5500 0    60   ~ 12
+XC7A200TFBG484
+$Comp
+L power:GND #GND_092
+U 1 1 58023F77
+P 3400 5500
+F 0 "#GND_092" H 3400 5500 20  0000 C CNN
+F 1 "+GND" H 3400 5430 30  0000 C CNN
+F 2 "" H 3400 5500 70  0000 C CNN
+F 3 "" H 3400 5500 70  0000 C CNN
+	1    3400 5500
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_093
+U 1 1 58023F76
+P 2700 9000
+F 0 "#GND_093" H 2700 9000 20  0000 C CNN
+F 1 "+GND" H 2700 8930 30  0000 C CNN
+F 2 "" H 2700 9000 70  0000 C CNN
+F 3 "" H 2700 9000 70  0000 C CNN
+	1    2700 9000
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_094
+U 1 1 58023F75
+P 3500 9000
+F 0 "#GND_094" H 3500 9000 20  0000 C CNN
+F 1 "+GND" H 3500 8930 30  0000 C CNN
+F 2 "" H 3500 9000 70  0000 C CNN
+F 3 "" H 3500 9000 70  0000 C CNN
+	1    3500 9000
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_095
+U 1 1 58023F74
+P 7000 5600
+F 0 "#GND_095" H 7000 5600 20  0000 C CNN
+F 1 "+GND" H 7000 5530 30  0000 C CNN
+F 2 "" H 7000 5600 70  0000 C CNN
+F 3 "" H 7000 5600 70  0000 C CNN
+	1    7000 5600
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_096
+U 1 1 58023F73
+P 7800 5600
+F 0 "#GND_096" H 7800 5600 20  0000 C CNN
+F 1 "+GND" H 7800 5530 30  0000 C CNN
+F 2 "" H 7800 5600 70  0000 C CNN
+F 3 "" H 7800 5600 70  0000 C CNN
+	1    7800 5600
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_097
+U 1 1 58023F72
+P 10300 8500
+F 0 "#GND_097" H 10300 8500 20  0000 C CNN
+F 1 "+GND" H 10300 8430 30  0000 C CNN
+F 2 "" H 10300 8500 70  0000 C CNN
+F 3 "" H 10300 8500 70  0000 C CNN
+	1    10300 8500
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #GND_098
+U 1 1 58023F71
+P 8900 8500
+F 0 "#GND_098" H 8900 8500 20  0000 C CNN
+F 1 "+GND" H 8900 8430 30  0000 C CNN
+F 2 "" H 8900 8500 70  0000 C CNN
+F 3 "" H 8900 8500 70  0000 C CNN
+	1    8900 8500
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_021
+U 1 1 58023F70
+P 4300 7400
+F 0 "#VCCO_3V3_021" H 4300 7400 20  0000 C CNN
+F 1 "+VCCO_3V3" H 4300 7330 30  0000 C CNN
+F 2 "" H 4300 7400 70  0000 C CNN
+F 3 "" H 4300 7400 70  0000 C CNN
+	1    4300 7400
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_022
+U 1 1 58023F6F
+P 5900 7400
+F 0 "#VCCO_3V3_022" H 5900 7400 20  0000 C CNN
+F 1 "+VCCO_3V3" H 5900 7330 30  0000 C CNN
+F 2 "" H 5900 7400 70  0000 C CNN
+F 3 "" H 5900 7400 70  0000 C CNN
+	1    5900 7400
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_023
+U 1 1 58023F6E
+P 8900 7400
+F 0 "#VCCO_3V3_023" H 8900 7400 20  0000 C CNN
+F 1 "+VCCO_3V3" H 8900 7330 30  0000 C CNN
+F 2 "" H 8900 7400 70  0000 C CNN
+F 3 "" H 8900 7400 70  0000 C CNN
+	1    8900 7400
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_024
+U 1 1 58023F6D
+P 10300 6600
+F 0 "#VCCO_3V3_024" H 10300 6600 20  0000 C CNN
+F 1 "+VCCO_3V3" H 10300 6530 30  0000 C CNN
+F 2 "" H 10300 6600 70  0000 C CNN
+F 3 "" H 10300 6600 70  0000 C CNN
+	1    10300 6600
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_025
+U 1 1 58023F6C
+P 3600 3700
+F 0 "#VCCO_3V3_025" H 3600 3700 20  0000 C CNN
+F 1 "+VCCO_3V3" H 3600 3630 30  0000 C CNN
+F 2 "" H 3600 3700 70  0000 C CNN
+F 3 "" H 3600 3700 70  0000 C CNN
+	1    3600 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:VCCO_3V3 #VCCO_3V3_026
+U 1 1 58023F6B
+P 7200 3300
+F 0 "#VCCO_3V3_026" H 7200 3300 20  0000 C CNN
+F 1 "+VCCO_3V3" H 7200 3230 30  0000 C CNN
+F 2 "" H 7200 3300 70  0000 C CNN
+F 3 "" H 7200 3300 70  0000 C CNN
+	1    7200 3300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3400 3900 3400 5500
+Wire Wire Line
+	3400 3900 3200 3900
+Wire Wire Line
+	2700 8800 2700 9000
+Wire Wire Line
+	3500 8800 3500 9000
+Wire Wire Line
+	7200 4800 7000 4800
+Wire Wire Line
+	7000 4800 7000 5600
+Wire Wire Line
+	7800 5400 7800 5600
+Wire Wire Line
+	10300 8300 10300 8500
+Wire Wire Line
+	10500 8300 10300 8300
+Wire Wire Line
+	10500 8200 10300 8200
+Wire Wire Line
+	10300 8200 10300 8300
+Wire Wire Line
+	10500 8100 10300 8100
+Wire Wire Line
+	10300 8100 10300 8200
+Connection ~ 10300 8300
+Connection ~ 10300 8200
+Wire Wire Line
+	8900 8200 8900 8500
+Wire Wire Line
+	4300 7400 4300 7600
+Wire Wire Line
+	5900 7400 5900 7700
+Wire Wire Line
+	10200 6900 10200 7000
+Wire Wire Line
+	10300 6900 10200 6900
+Wire Wire Line
+	10400 6900 10300 6900
+Wire Wire Line
+	10400 6900 10400 7000
+Wire Wire Line
+	10300 6900 10300 7000
+Wire Wire Line
+	10300 6600 10300 6900
+Connection ~ 10300 6900
+Wire Wire Line
+	10500 7600 8900 7600
+Wire Wire Line
+	8900 7400 8900 7600
+Wire Wire Line
+	8900 7600 8900 7900
+Connection ~ 8900 7600
+Wire Wire Line
+	7200 3500 7000 3500
+Wire Wire Line
+	7400 3500 7200 3500
+Wire Wire Line
+	7400 3500 7400 3700
+Wire Wire Line
+	7000 3500 7000 3700
+Wire Wire Line
+	7200 3300 7200 3500
+Connection ~ 7200 3500
+Wire Wire Line
+	3600 4000 3200 4000
+Wire Wire Line
+	3600 4100 3200 4100
+Wire Wire Line
+	3600 4000 3600 4100
+Wire Wire Line
+	3600 4200 3200 4200
+Wire Wire Line
+	3600 4100 3600 4200
+Wire Wire Line
+	3600 3700 3600 4000
+Connection ~ 3600 4000
+Connection ~ 3600 4100
+Wire Wire Line
+	4600 4900 3200 4900
+Text Label 4600 4900 2    48   ~ 0
+FPGA_M2
+Wire Wire Line
+	2700 8200 2700 8400
+Wire Wire Line
+	2700 8200 2100 8200
+Text Label 2100 8200 0    48   ~ 0
+FPGA_M2
+Wire Wire Line
+	4600 5000 3200 5000
+Text Label 4600 5000 2    48   ~ 0
+FPGA_JTAG_TCK
+Text Label 9630 7700 0    48   ~ 0
+FPGA_JTAG_TCK
+Wire Wire Line
+	4600 5100 3200 5100
+Text Label 4600 5100 2    48   ~ 0
+FPGA_JTAG_TDI
+Wire Wire Line
+	10500 7900 10200 7900
+Text Label 9630 7900 0    48   ~ 0
+FPGA_JTAG_TDI
+Wire Wire Line
+	4600 5200 3200 5200
+Text Label 4600 5200 2    48   ~ 0
+FPGA_JTAG_TDO
+Wire Wire Line
+	10500 8000 9630 8000
+Text Label 9630 8000 0    48   ~ 0
+FPGA_JTAG_TDO
+Wire Wire Line
+	4600 5300 3200 5300
+Text Label 4600 5300 2    48   ~ 0
+FPGA_JTAG_TMS
+Wire Wire Line
+	10500 7800 10300 7800
+Text Label 9630 7800 0    48   ~ 0
+FPGA_JTAG_TMS
+Wire Wire Line
+	7400 4100 7400 4300
+Wire Wire Line
+	8800 4300 7400 4300
+Text GLabel 8800 4300 2    48   Input ~ 0
+FPGA_PROGRAM_B
+Wire Wire Line
+	5140 4500 4440 4500
+Text GLabel 5140 4500 2    48   Input ~ 0
+FPGA_PROGRAM_B
+Wire Wire Line
+	4600 4300 3200 4300
+Text Label 4600 4300 2    48   ~ 0
+FPGA_DONE_INT
+Wire Wire Line
+	5900 8600 5900 8700
+Wire Wire Line
+	5900 8700 4900 8700
+Wire Wire Line
+	6200 8700 5900 8700
+Text Label 4900 8700 0    48   ~ 0
+FPGA_DONE_INT
+Connection ~ 5900 8700
+Wire Wire Line
+	4600 4700 3200 4700
+Text Label 4600 4700 2    48   ~ 0
+FPGA_M0
+Wire Wire Line
+	4300 8200 3700 8200
+Wire Wire Line
+	4300 8000 4300 8200
+Text Label 3700 8200 0    48   ~ 0
+FPGA_M0
+Wire Wire Line
+	4600 4800 3200 4800
+Text Label 4600 4800 2    48   ~ 0
+FPGA_M1
+Wire Wire Line
+	3500 8200 2900 8200
+Wire Wire Line
+	3500 8200 3500 8400
+Text Label 2900 8200 0    48   ~ 0
+FPGA_M1
+Wire Wire Line
+	7000 4100 7000 4600
+Wire Wire Line
+	7000 4600 6000 4600
+Wire Wire Line
+	7200 4600 7000 4600
+Text Label 6000 4600 0    48   ~ 0
+FPGA_INIT_B_INT
+Connection ~ 7000 4600
+Wire Wire Line
+	5140 4400 4440 4400
+Text Label 5140 4400 2    48   ~ 0
+FPGA_INIT_B_INT
+Wire Wire Line
+	7800 4800 7600 4800
+Wire Wire Line
+	7800 4800 7800 5000
+Wire Wire Line
+	8800 4800 7800 4800
+Text GLabel 8800 4800 2    48   BiDi ~ 0
+FPGA_INIT_B
+Connection ~ 7800 4800
+Wire Wire Line
+	5900 8100 5900 8300
+Wire Wire Line
+	6900 8700 6600 8700
+Text GLabel 6900 8700 2    48   Output ~ 0
+FPGA_DONE
+Wire Wire Line
+	5140 4600 4440 4600
+Text GLabel 5140 4600 2    48   Output ~ 0
+FPGA_CFG_SCLK
+Wire Wire Line
+	4040 4400 3200 4400
+Text Label 3420 4400 0    48   ~ 0
+FPGA_INIT_B_INT1
+Wire Wire Line
+	4040 4500 3200 4500
+Text Label 3420 4500 0    48   ~ 0
+FPGA_PROGRAM_B1
+Wire Wire Line
+	4040 4600 3200 4600
+Text Label 3420 4600 0    48   ~ 0
+FPGA_CFG_SCLK1
+Wire Wire Line
+	10300 7800 10300 7400
+Wire Wire Line
+	10400 7700 10400 7400
+Wire Wire Line
+	10200 7900 10200 7400
+Wire Wire Line
+	10400 7700 10500 7700
+Wire Wire Line
+	9630 7700 10400 7700
+Connection ~ 10200 7900
+Connection ~ 10300 7800
+Connection ~ 10400 7700
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R35
+U 1 1 58023F6A
+P 2700 8600
+F 0 "R35" V 2610 8555 60  0000 R TNN
+F 1 "1k" V 2630 8510 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 2630 8510 60  0001 C CNN
+F 3 "" H 2630 8510 60  0000 C CNN
+	1    2700 8600
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R39
+U 1 1 58023F69
+P 6400 8700
+F 0 "R39" H 6510 8845 60  0000 R TNN
+F 1 "100" H 6420 8850 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 6420 8850 60  0001 C CNN
+F 3 "" H 6420 8850 60  0000 C CNN
+	1    6400 8700
+	-1   0    0    1   
+$EndComp
+$Comp
+L Cryptech_Alpha:MA08-1 SV1
+U 1 1 58023F68
+P 10800 7900
+F 0 "SV1" H 10980 8530 60  0000 R TNN
+F 1 "MA08-1" H 10760 8530 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:PLS-8" H 10760 8530 60  0001 C CNN
+F 3 "" H 10760 8530 60  0000 C CNN
+	1    10800 7900
+	-1   0    0    1   
+$EndComp
+$Comp
+L Cryptech_Alpha:C-EUC0402 C108
+U 1 1 58023F67
+P 8900 8000
+F 0 "C108" H 8980 7810 60  0000 L BNN
+F 1 "0.1uF" H 9060 7910 60  0000 L BNN
+F 2 "Cryptech_Alpha_Footprints:C_0402" H 9060 7910 60  0001 C CNN
+F 3 "" H 9060 7910 60  0000 C CNN
+	1    8900 8000
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R43
+U 1 1 58023F66
+P 10200 7200
+F 0 "R43" V 10359 6850 60  0000 R TNN
+F 1 "10k" V 10370 6650 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 10370 6650 60  0001 C CNN
+F 3 "" H 10370 6650 60  0000 C CNN
+	1    10200 7200
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R44
+U 1 1 58023F65
+P 10300 7200
+F 0 "R44" V 10359 6950 60  0000 R TNN
+F 1 "10k" V 10370 6750 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 10370 6750 60  0001 C CNN
+F 3 "" H 10370 6750 60  0000 C CNN
+	1    10300 7200
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R45
+U 1 1 58023F64
+P 10400 7200
+F 0 "R45" V 10359 7050 60  0000 R TNN
+F 1 "10k" V 10370 6850 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 10370 6850 60  0001 C CNN
+F 3 "" H 10370 6850 60  0000 C CNN
+	1    10400 7200
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0603 R62
+U 1 1 58023F63
+P 4240 4400
+F 0 "R62" H 4350 4090 60  0000 R TNN
+F 1 "0" H 4140 4090 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 4140 4090 60  0001 C CNN
+F 3 "" H 4140 4090 60  0000 C CNN
+	1    4240 4400
+	-1   0    0    1   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0603 R63
+U 1 1 58023F62
+P 4240 4500
+F 0 "R63" H 4350 4160 60  0000 R TNN
+F 1 "0" H 4140 4150 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 4140 4150 60  0001 C CNN
+F 3 "" H 4140 4150 60  0000 C CNN
+	1    4240 4500
+	-1   0    0    1   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0603 R71
+U 1 1 58023F61
+P 4240 4600
+F 0 "R71" H 4350 4230 60  0000 R TNN
+F 1 "0" H 4140 4220 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 4140 4220 60  0001 C CNN
+F 3 "" H 4140 4220 60  0000 C CNN
+	1    4240 4600
+	-1   0    0    1   
+$EndComp
+$Comp
+L Cryptech_Alpha:XC7A200TFBG484_NEW U13
+U 1 1 58023F60
+P 3000 4600
+F 0 "U13" H 2590 3690 60  0000 L BNN
+F 1 "~" H 3000 4600 50  0001 C CNN
+F 2 "Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254" H 2590 3690 60  0001 C CNN
+F 3 "" H 3000 4600 50  0001 C CNN
+	1    3000 4600
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R36
+U 1 1 58023F5F
+P 3500 8600
+F 0 "R36" V 3410 8555 60  0000 R TNN
+F 1 "1k" V 3440 8510 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 3440 8510 60  0001 C CNN
+F 3 "" H 3440 8510 60  0000 C CNN
+	1    3500 8600
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R37
+U 1 1 58023F5E
+P 4300 7800
+F 0 "R37" V 4359 7650 60  0000 R TNN
+F 1 "1k" V 4260 7660 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 4260 7660 60  0001 C CNN
+F 3 "" H 4260 7660 60  0000 C CNN
+	1    4300 7800
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R41
+U 1 1 58023F5D
+P 7400 3900
+F 0 "R41" V 7471 3747 60  0000 R TNN
+F 1 "4.7k" V 7390 3750 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 7390 3750 60  0001 C CNN
+F 3 "" H 7390 3750 60  0000 C CNN
+	1    7400 3900
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R40
+U 1 1 58023F5C
+P 7000 3900
+F 0 "R40" V 7071 4247 60  0000 R TNN
+F 1 "4.7k" V 6980 4250 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 6980 4250 60  0001 C CNN
+F 3 "" H 6980 4250 60  0000 C CNN
+	1    7000 3900
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:2N7002 Q4
+U 1 1 58023F5B
+P 7400 4700
+F 0 "Q4" H 7510 4445 60  0000 R BNN
+F 1 "2N7002P,235" H 7620 4855 60  0000 R BNN
+F 2 "Cryptech_Alpha_Footprints:SOT-23" H 7620 4855 60  0001 C CNN
+F 3 "" H 7620 4855 60  0000 C CNN
+	1    7400 4700
+	-1   0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R42
+U 1 1 58023F5A
+P 7800 5200
+F 0 "R42" V 7759 5050 60  0000 R TNN
+F 1 "4.7k" V 7670 5050 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 7670 5050 60  0001 C CNN
+F 3 "" H 7670 5050 60  0000 C CNN
+	1    7800 5200
+	0    -1   -1   0   
+$EndComp
+$Comp
+L Cryptech_Alpha:LEDCHIP-LED0603 LED13
+U 1 1 58023F59
+P 5900 8400
+F 0 "LED13" H 6020 8460 60  0000 L BNN
+F 1 "LTST-C191KRKT" H 6020 8275 60  0000 L BNN
+F 2 "Cryptech_Alpha_Footprints:VD_0603" H 6020 8275 60  0001 C CNN
+F 3 "" H 6020 8275 60  0000 C CNN
+	1    5900 8400
+	1    0    0    -1  
+$EndComp
+$Comp
+L Cryptech_Alpha:R-EU_R0402 R38
+U 1 1 58023F58
+P 5900 7900
+F 0 "R38" V 5959 7750 60  0000 R TNN
+F 1 "330" V 5870 7760 60  0000 R TNN
+F 2 "Cryptech_Alpha_Footprints:R_0402" H 5870 7760 60  0001 C CNN
+F 3 "" H 5870 7760 60  0000 C CNN
+	1    5900 7900
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	9630 7900 10200 7900
+Wire Wire Line
+	9630 7800 10300 7800
+$EndSCHEMATC