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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-09-23 15:44:28 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2020-09-23 15:44:28 +0300
commit659a6fc9d671a9f3e95ea875997a55beae46d1b1 (patch)
treed789b19f20c9359222c85409729d48b2300a5257 /KiCAD/rev04_03.sch-bak
parentfc4e5abb6f34abc1ab28d67c905dc6ded4c3e530 (diff)
First attempt at automatic BOM export failed. Turns out some of the components
didn't have partnumbers attached for some reason (?). Doing an overhaul.
Diffstat (limited to 'KiCAD/rev04_03.sch-bak')
-rw-r--r--KiCAD/rev04_03.sch-bak8
1 files changed, 4 insertions, 4 deletions
diff --git a/KiCAD/rev04_03.sch-bak b/KiCAD/rev04_03.sch-bak
index 6afe9be..35d7baa 100644
--- a/KiCAD/rev04_03.sch-bak
+++ b/KiCAD/rev04_03.sch-bak
@@ -13,13 +13,13 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
-Text Notes 6640 6200 0 60 ~ 12
+Text Notes 6790 6300 0 60 ~ 12
ST 4488 §5.1\nBOOT0 to GND boots\nMain Flash Memory
Text Notes 2500 3980 0 60 ~ 12
ST AN4488 §4.1.2\nsuggests 25 MHz for good\nEthernet, USB OTG and I2C
Text Notes 12400 3200 0 60 ~ 12
SWD program/debug
-Text Notes 13130 4670 0 60 ~ 12
+Text Notes 13880 4170 0 60 ~ 12
ST AN4488 §2.3.3\nReset circuit not needed,\nbut pull-down cap\nrecommended.
Text Notes 5140 4340 0 60 ~ 12
PDR_ON high enables\ninternal power regulator
@@ -322,7 +322,7 @@ L Cryptech_Alpha:STM32F429BIT6_NEW U4
U 2 1 58024086
P 8000 4900
F 0 "U4" H 6890 3890 60 0000 L BNN
-F 1 "~" H 8000 4900 50 0001 C CNN
+F 1 "STM32F429BIT6" H 8000 4900 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:TSQFP50P3000X3000X160-208N" H 6890 3890 60 0001 C CNN
F 3 "" H 8000 4900 50 0001 C CNN
2 8000 4900
@@ -333,7 +333,7 @@ L Cryptech_Alpha:STM32-SWD J1
U 1 1 58024085
P 13440 4130
F 0 "J1" H 13588 3700 60 0000 R TNN
-F 1 "~" H 13440 4130 50 0001 C CNN
+F 1 "PLS-6" H 13440 4130 50 0001 C CNN
F 2 "Cryptech_Alpha_Footprints:PLS-6" H 13588 3700 60 0001 C CNN
F 3 "" H 13440 4130 50 0001 C CNN
1 13440 4130