diff options
| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-09-23 15:11:11 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-09-23 15:11:11 +0300 |
| commit | 1dee9e20eccc1cf3a6396d88c765b44faebacdd2 (patch) | |
| tree | 1189394c7bbb3bfd232397208b7c8bf5ac8bf108 /KiCAD/rev02_10.sch-bak | |
| parent | a70ee229e036c7ae9ef61af5a73cc32ea6b773ca (diff) | |
Almost finished doing edits to schematics. Added Lattice iCE40 UltraPlus FPGA
along with it's power subsystem and programming circuitry.
Diffstat (limited to 'KiCAD/rev02_10.sch-bak')
| -rw-r--r-- | KiCAD/rev02_10.sch-bak | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/KiCAD/rev02_10.sch-bak b/KiCAD/rev02_10.sch-bak index f67bf67..b7f51df 100644 --- a/KiCAD/rev02_10.sch-bak +++ b/KiCAD/rev02_10.sch-bak @@ -3,7 +3,7 @@ EELAYER 30 0 EELAYER END $Descr B 17000 11000 encoding utf-8 -Sheet 12 27 +Sheet 11 27 Title "rev02_10" Date "15 10 2016" Rev "" @@ -495,12 +495,8 @@ Wire Wire Line Text Label 7150 4600 0 48 ~ 0 FT_REF1 Wire Wire Line - 7400 3700 6700 3700 -Wire Wire Line 6620 3700 6100 3700 Wire Wire Line - 6700 3700 6620 3700 -Wire Wire Line 6620 3700 6620 4400 Text Label 6100 3700 0 48 ~ 0 FT_MGMT_VCC3V3 @@ -1105,4 +1101,6 @@ F 3 "~" H 6500 7800 50 0001 C CNN 1 6500 7800 1 0 0 -1 $EndComp +Wire Wire Line + 6620 3700 7400 3700 $EndSCHEMATC |