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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2021-06-07 13:31:03 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2021-06-07 13:31:03 +0300
commite08dc0de68ed2b159a06eca81da5c9b1450830b0 (patch)
tree4e974ee9f53de8dd848903c521ce5f456a282dcb /KiCAD/footprints.pretty/C_D.kicad_mod
parent9654386f25d49785f6a8bdf37a3db21106e97432 (diff)
Repaired fabrication layers for all the footprints. These are used to generate
assembly drawings needed for soldering. As it turned out, component outlines got imported just as a set of lines from Altium, without linking them to the actual component. Moreover, reference designators didn't get converted altogether, had to add them manually.
Diffstat (limited to 'KiCAD/footprints.pretty/C_D.kicad_mod')
-rw-r--r--KiCAD/footprints.pretty/C_D.kicad_mod12
1 files changed, 11 insertions, 1 deletions
diff --git a/KiCAD/footprints.pretty/C_D.kicad_mod b/KiCAD/footprints.pretty/C_D.kicad_mod
index 1a1215a..96a274d 100644
--- a/KiCAD/footprints.pretty/C_D.kicad_mod
+++ b/KiCAD/footprints.pretty/C_D.kicad_mod
@@ -1,4 +1,4 @@
-(module C_D (layer F.Cu) (tedit 4289BEAB)
+(module C_D (layer F.Cu) (tedit 60BDD1BE)
(attr smd)
(fp_text reference C127 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
@@ -6,6 +6,16 @@
(fp_text value "Kemet Tantalum Capacitor" (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at -0.254 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -4.826 -1.778) (end 4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 -1.778) (end 4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 1.778) (end -4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.826 1.778) (end -4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.572 -2.032) (end 4.572 -3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.064 -2.54) (end 5.08 -2.54) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 4.826 1.778) (xy 4.318 1.778) (xy 4.318 -1.778) (xy 4.826 -1.778)) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask))
(model wrlshp/SW3dPS-cap_d.wrl